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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.h13
1 files changed, 0 insertions, 13 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index 1ebe43c0f7e..272dc615009 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -725,19 +725,6 @@ namespace llvm {
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
- // Return true if it is profitable to combine a BUILD_VECTOR to a TRUNCATE
- // for given operand and result types.
- // Example of such a combine:
- // v4i32 build_vector((extract_elt V, 0),
- // (extract_elt V, 2),
- // (extract_elt V, 4),
- // (extract_elt V, 6))
- // -->
- // v4i32 truncate (bitcast V to v4i64)
- bool isDesirableToCombineBuildVectorToTruncate() const override {
- return true;
- }
-
// Return true if it is profitable to combine a BUILD_VECTOR with a
// stride-pattern to a shuffle and a truncate.
// Example of such a combine:
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