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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp13
1 files changed, 0 insertions, 13 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index de3df34ec44..073b4e01377 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1687,19 +1687,6 @@ bool X86TargetLowering::useLoadStackGuardNode() const {
return Subtarget.isTargetMachO() && Subtarget.is64Bit();
}
-bool X86TargetLowering::useStackGuardXorFP() const {
- // Currently only MSVC CRTs XOR the frame pointer into the stack guard value.
- return Subtarget.getTargetTriple().isOSMSVCRT();
-}
-
-SDValue X86TargetLowering::emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val,
- const SDLoc &DL) const {
- EVT PtrTy = getPointerTy(DAG.getDataLayout());
- unsigned XorOp = Subtarget.is64Bit() ? X86::XOR64_FP : X86::XOR32_FP;
- MachineSDNode *Node = DAG.getMachineNode(XorOp, DL, PtrTy, Val);
- return SDValue(Node, 0);
-}
-
TargetLoweringBase::LegalizeTypeAction
X86TargetLowering::getPreferredVectorAction(EVT VT) const {
if (ExperimentalVectorWideningLegalization &&
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