diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index d0e9b365462..880db37675f 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18999,13 +18999,14 @@ static SDValue LowerSIGN_EXTEND(SDValue Op, const X86Subtarget &Subtarget, static SDValue LowerStore(SDValue Op, const X86Subtarget &Subtarget, SelectionDAG &DAG) { StoreSDNode *St = cast<StoreSDNode>(Op.getNode()); - EVT VT = St->getValue().getValueType(); SDLoc dl(St); - SDValue StoredVal = St->getOperand(1); + SDValue StoredVal = St->getValue(); // Without AVX512DQ, we need to use a scalar type for v2i1/v4i1/v8i1 loads. - assert(VT.isVector() && VT.getVectorElementType() == MVT::i1 && - VT.getVectorNumElements() <= 8 && "Unexpected VT"); + assert(StoredVal.getValueType().isVector() && + StoredVal.getValueType().getVectorElementType() == MVT::i1 && + StoredVal.getValueType().getVectorNumElements() <= 8 && + "Unexpected VT"); assert(!St->isTruncatingStore() && "Expected non-truncating store"); assert(Subtarget.hasAVX512() && !Subtarget.hasDQI() && "Expected AVX512F without AVX512DQI"); |
