diff options
Diffstat (limited to 'llvm/lib/Target/X86/MCTargetDesc')
| -rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 23 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 14 |
2 files changed, 19 insertions, 18 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 5d6bc5ff7a0..5915d119307 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -328,21 +328,28 @@ namespace X86II { OpSizeShift = 7, OpSizeMask = 0x3 << OpSizeShift, - OpSize16 = 1 << OpSizeShift, - OpSize32 = 2 << OpSizeShift, - - // AsSize - Set if this instruction requires an operand size prefix (0x67), - // which most often indicates that the instruction address 16 bit address - // instead of 32 bit address (or 32 bit address in 64 bit mode). + OpSizeFixed = 0 << OpSizeShift, + OpSize16 = 1 << OpSizeShift, + OpSize32 = 2 << OpSizeShift, + + // AsSize - AdSizeX implies this instruction determines its need of 0x67 + // prefix from a normal ModRM memory operand. The other types indicate that + // an operand is encoded with a specific width and a prefix is needed if + // it differs from the current mode. AdSizeShift = OpSizeShift + 2, - AdSize = 1 << AdSizeShift, + AdSizeMask = 0x3 << AdSizeShift, + + AdSizeX = 1 << AdSizeShift, + AdSize16 = 1 << AdSizeShift, + AdSize32 = 2 << AdSizeShift, + AdSize64 = 3 << AdSizeShift, //===------------------------------------------------------------------===// // OpPrefix - There are several prefix bytes that are used as opcode // extensions. These are 0x66, 0xF3, and 0xF2. If this field is 0 there is // no prefix. // - OpPrefixShift = AdSizeShift + 1, + OpPrefixShift = AdSizeShift + 2, OpPrefixMask = 0x7 << OpPrefixShift, // PS, PD - Prefix code for packed single and double precision vector diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index 443fac4770a..5d925243dd6 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -1199,16 +1199,10 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, // Emit the address size opcode prefix as needed. bool need_address_override; - // The AdSize prefix is only for 32-bit and 64-bit modes. Hm, perhaps we - // should introduce an AdSize16 bit instead of having seven special cases? - if ((!is16BitMode(STI) && TSFlags & X86II::AdSize) || - (is16BitMode(STI) && (MI.getOpcode() == X86::JECXZ_32 || - MI.getOpcode() == X86::MOV8o8a || - MI.getOpcode() == X86::MOV16o16a || - MI.getOpcode() == X86::MOV32o32a || - MI.getOpcode() == X86::MOV8ao8 || - MI.getOpcode() == X86::MOV16ao16 || - MI.getOpcode() == X86::MOV32ao32))) { + uint64_t AdSize = TSFlags & X86II::AdSizeMask; + if ((is16BitMode(STI) && AdSize == X86II::AdSize32) || + (is32BitMode(STI) && AdSize == X86II::AdSize16) || + (is64BitMode(STI) && AdSize == X86II::AdSize32)) { need_address_override = true; } else if (MemoryOperand < 0) { need_address_override = false; |
