diff options
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp')
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 32 | 
1 files changed, 24 insertions, 8 deletions
| diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp index 1f280e1d13f..b9fa6bbdf04 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp @@ -169,41 +169,54 @@ void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {    switch (MI->getOpcode()) {    case WebAssembly::ARGUMENT_I32: +  case WebAssembly::ARGUMENT_I32_S:    case WebAssembly::ARGUMENT_I64: +  case WebAssembly::ARGUMENT_I64_S:    case WebAssembly::ARGUMENT_F32: +  case WebAssembly::ARGUMENT_F32_S:    case WebAssembly::ARGUMENT_F64: +  case WebAssembly::ARGUMENT_F64_S:    case WebAssembly::ARGUMENT_v16i8: +  case WebAssembly::ARGUMENT_v16i8_S:    case WebAssembly::ARGUMENT_v8i16: +  case WebAssembly::ARGUMENT_v8i16_S:    case WebAssembly::ARGUMENT_v4i32: +  case WebAssembly::ARGUMENT_v4i32_S:    case WebAssembly::ARGUMENT_v4f32: +  case WebAssembly::ARGUMENT_v4f32_S:      // These represent values which are live into the function entry, so there's      // no instruction to emit.      break;    case WebAssembly::FALLTHROUGH_RETURN_I32: +  case WebAssembly::FALLTHROUGH_RETURN_I32_S:    case WebAssembly::FALLTHROUGH_RETURN_I64: +  case WebAssembly::FALLTHROUGH_RETURN_I64_S:    case WebAssembly::FALLTHROUGH_RETURN_F32: +  case WebAssembly::FALLTHROUGH_RETURN_F32_S:    case WebAssembly::FALLTHROUGH_RETURN_F64: +  case WebAssembly::FALLTHROUGH_RETURN_F64_S:    case WebAssembly::FALLTHROUGH_RETURN_v16i8: +  case WebAssembly::FALLTHROUGH_RETURN_v16i8_S:    case WebAssembly::FALLTHROUGH_RETURN_v8i16: +  case WebAssembly::FALLTHROUGH_RETURN_v8i16_S:    case WebAssembly::FALLTHROUGH_RETURN_v4i32: -  case WebAssembly::FALLTHROUGH_RETURN_v4f32: { +  case WebAssembly::FALLTHROUGH_RETURN_v4i32_S: +  case WebAssembly::FALLTHROUGH_RETURN_v4f32: +  case WebAssembly::FALLTHROUGH_RETURN_v4f32_S: {      // These instructions represent the implicit return at the end of a -    // function body. The operand is always a pop. -    assert(MFI->isVRegStackified(MI->getOperand(0).getReg())); - +    // function body. Always pops one value off the stack.      if (isVerbose()) { -      OutStreamer->AddComment("fallthrough-return: $pop" + -                              Twine(MFI->getWARegStackId( -                                  MFI->getWAReg(MI->getOperand(0).getReg())))); +      OutStreamer->AddComment("fallthrough-return-value");        OutStreamer->AddBlankLine();      }      break;    }    case WebAssembly::FALLTHROUGH_RETURN_VOID: +  case WebAssembly::FALLTHROUGH_RETURN_VOID_S:      // This instruction represents the implicit return at the end of a      // function body with no return value.      if (isVerbose()) { -      OutStreamer->AddComment("fallthrough-return"); +      OutStreamer->AddComment("fallthrough-return-void");        OutStreamer->AddBlankLine();      }      break; @@ -244,6 +257,9 @@ bool WebAssemblyAsmPrinter::PrintAsmOperand(const MachineInstr *MI,        OS << MO.getImm();        return false;      case MachineOperand::MO_Register: +      // FIXME: only opcode that still contains registers, as required by +      // MachineInstr::getDebugVariable(). +      assert(MI->getOpcode() == WebAssembly::INLINEASM);        OS << regToString(MO);        return false;      case MachineOperand::MO_GlobalAddress: | 

