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-rw-r--r--llvm/lib/Target/SystemZ/SystemZPatterns.td14
1 files changed, 0 insertions, 14 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZPatterns.td b/llvm/lib/Target/SystemZ/SystemZPatterns.td
index 5419c2badf9..74cc5f019a8 100644
--- a/llvm/lib/Target/SystemZ/SystemZPatterns.td
+++ b/llvm/lib/Target/SystemZ/SystemZPatterns.td
@@ -54,20 +54,6 @@ multiclass RMWIByte<SDPatternOperator operator, AddressingMode mode,
def : RMWI<anyextloadi8, operator, truncstorei8, mode, imm64, insn>;
}
-// Record that INSN conditionally performs load operation LOAD into a
-// register of class CLS. The load may trap even if the condition is false.
-multiclass CondLoad<Instruction insn, RegisterOperand cls,
- SDPatternOperator load> {
- def : Pat<(z_select_ccmask (load bdaddr20only:$addr), cls:$new, uimm8zx4,
- uimm8zx4:$cc),
- (insn cls:$new, bdaddr20only:$addr, uimm8zx4:$cc)>,
- Requires<[FeatureLoadStoreOnCond]>;
- def : Pat<(z_select_ccmask cls:$new, (load bdaddr20only:$addr), uimm8zx4,
- uimm8zx4:$cc),
- (insn cls:$new, bdaddr20only:$addr, (INVCC uimm8zx4:$cc))>,
- Requires<[FeatureLoadStoreOnCond]>;
-}
-
// Record that INSN performs insertion TYPE into a register of class CLS.
// The inserted operand is loaded using LOAD from an address of mode MODE.
multiclass InsertMem<string type, Instruction insn, RegisterOperand cls,
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