diff options
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZInstrInfo.h')
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZInstrInfo.h | 47 |
1 files changed, 23 insertions, 24 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.h b/llvm/lib/Target/SystemZ/SystemZInstrInfo.h index b42791c7a09..20ac8606d34 100644 --- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.h +++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.h @@ -136,13 +136,13 @@ class SystemZInstrInfo : public SystemZGenInstrInfo { void splitMove(MachineBasicBlock::iterator MI, unsigned NewOpcode) const; void splitAdjDynAlloc(MachineBasicBlock::iterator MI) const; - void expandRIPseudo(MachineInstr *MI, unsigned LowOpcode, - unsigned HighOpcode, bool ConvertHigh) const; - void expandRIEPseudo(MachineInstr *MI, unsigned LowOpcode, + void expandRIPseudo(MachineInstr &MI, unsigned LowOpcode, unsigned HighOpcode, + bool ConvertHigh) const; + void expandRIEPseudo(MachineInstr &MI, unsigned LowOpcode, unsigned LowOpcodeK, unsigned HighOpcode) const; - void expandRXYPseudo(MachineInstr *MI, unsigned LowOpcode, + void expandRXYPseudo(MachineInstr &MI, unsigned LowOpcode, unsigned HighOpcode) const; - void expandZExtPseudo(MachineInstr *MI, unsigned LowOpcode, + void expandZExtPseudo(MachineInstr &MI, unsigned LowOpcode, unsigned Size) const; void expandLoadStackGuard(MachineInstr *MI) const; void emitGRX32Move(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, @@ -154,11 +154,11 @@ public: explicit SystemZInstrInfo(SystemZSubtarget &STI); // Override TargetInstrInfo. - unsigned isLoadFromStackSlot(const MachineInstr *MI, + unsigned isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override; - unsigned isStoreToStackSlot(const MachineInstr *MI, + unsigned isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override; - bool isStackSlotCopy(const MachineInstr *MI, int &DestFrameIndex, + bool isStackSlotCopy(const MachineInstr &MI, int &DestFrameIndex, int &SrcFrameIndex) const override; bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, @@ -168,9 +168,9 @@ public: unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL) const override; - bool analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, + bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const override; - bool optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, + bool optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, const MachineRegisterInfo *MRI) const override; bool isPredicable(MachineInstr &MI) const override; @@ -200,19 +200,18 @@ public: const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override; MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI, - MachineBasicBlock::iterator &MBBI, + MachineInstr &MI, LiveVariables *LV) const override; - MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, - ArrayRef<unsigned> Ops, - MachineBasicBlock::iterator InsertPt, - int FrameIndex, - LiveIntervals *LIS = nullptr) const override; - MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, - ArrayRef<unsigned> Ops, - MachineBasicBlock::iterator InsertPt, - MachineInstr *LoadMI, - LiveIntervals *LIS = nullptr) const override; - bool expandPostRAPseudo(MachineBasicBlock::iterator MBBI) const override; + MachineInstr * + foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI, + ArrayRef<unsigned> Ops, + MachineBasicBlock::iterator InsertPt, int FrameIndex, + LiveIntervals *LIS = nullptr) const override; + MachineInstr *foldMemoryOperandImpl( + MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops, + MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI, + LiveIntervals *LIS = nullptr) const override; + bool expandPostRAPseudo(MachineInstr &MBBI) const override; bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; @@ -220,14 +219,14 @@ public: const SystemZRegisterInfo &getRegisterInfo() const { return RI; } // Return the size in bytes of MI. - uint64_t getInstSizeInBytes(const MachineInstr *MI) const; + uint64_t getInstSizeInBytes(const MachineInstr &MI) const; // Return true if MI is a conditional or unconditional branch. // When returning true, set Cond to the mask of condition-code // values on which the instruction will branch, and set Target // to the operand that contains the branch target. This target // can be a register or a basic block. - SystemZII::Branch getBranchInfo(const MachineInstr *MI) const; + SystemZII::Branch getBranchInfo(const MachineInstr &MI) const; // Get the load and store opcodes for a given register class. void getLoadStoreOpcodes(const TargetRegisterClass *RC, |
