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-rw-r--r--llvm/lib/Target/Sparc/Sparc.cpp20
-rw-r--r--llvm/lib/Target/Sparc/SparcInternals.h31
2 files changed, 39 insertions, 12 deletions
diff --git a/llvm/lib/Target/Sparc/Sparc.cpp b/llvm/lib/Target/Sparc/Sparc.cpp
index 80de2e7ca69..cf09734e81b 100644
--- a/llvm/lib/Target/Sparc/Sparc.cpp
+++ b/llvm/lib/Target/Sparc/Sparc.cpp
@@ -8,6 +8,7 @@
// 7/15/01 - Vikram Adve - Created
//**************************************************************************/
+#include "llvm/CodeGen/Sparc.h"
#include "SparcInternals.h"
#include "llvm/Method.h"
#include "llvm/CodeGen/InstrScheduling.h"
@@ -91,22 +92,14 @@ UltraSparcSchedInfo::initializeResources()
//
//---------------------------------------------------------------------------
-UltraSparc::UltraSparc() : TargetMachine("UltraSparc-Native") {
- machineInstrInfo = new UltraSparcInstrInfo();
- machineSchedInfo = new UltraSparcSchedInfo(machineInstrInfo);
-
+UltraSparc::UltraSparc() : TargetMachine("UltraSparc-Native"),
+ InstSchedulingInfo(&InstInfo) {
optSizeForSubWordData = 4;
minMemOpWordSize = 8;
maxAtomicMemOpWordSize = 8;
zeroRegNum = 0; // %g0 always gives 0 on Sparc
}
-UltraSparc::~UltraSparc() {
- delete (UltraSparcInstrInfo*) machineInstrInfo;
- delete (UltraSparcSchedInfo*) machineSchedInfo;
-}
-
-
bool UltraSparc::compileMethod(Method *M) {
if (SelectInstructionsForMethod(M, *this)) {
cerr << "Instruction selection failed for method " << M->getName()
@@ -114,10 +107,15 @@ bool UltraSparc::compileMethod(Method *M) {
return true;
}
- if (ScheduleInstructionsWithSSA(M, *this)) {
+ if (ScheduleInstructionsWithSSA(M, *this, InstSchedulingInfo)) {
cerr << "Instruction scheduling before allocation failed for method "
<< M->getName() << "\n\n";
return true;
}
return false;
}
+
+// allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
+// that implements the Sparc backend.
+//
+TargetMachine *allocateSparcTargetMachine() { return new UltraSparc(); }
diff --git a/llvm/lib/Target/Sparc/SparcInternals.h b/llvm/lib/Target/Sparc/SparcInternals.h
index df290d63e72..606966db731 100644
--- a/llvm/lib/Target/Sparc/SparcInternals.h
+++ b/llvm/lib/Target/Sparc/SparcInternals.h
@@ -8,12 +8,14 @@
#ifndef SPARC_INTERNALS_H
#define SPARC_INTERNALS_H
-#include "llvm/CodeGen/Sparc.h"
+#include "llvm/CodeGen/TargetMachine.h"
#include "SparcRegInfo.h"
#include <sys/types.h>
#include "llvm/Type.h"
+class UltraSparc;
+
// OpCodeMask definitions for the Sparc V9
//
const OpCodeMask Immed = 0x00002000; // immed or reg operand?
@@ -1664,4 +1666,31 @@ protected:
virtual void initializeResources ();
};
+
+//---------------------------------------------------------------------------
+// class UltraSparcMachine
+//
+// Purpose:
+// Primary interface to machine description for the UltraSPARC.
+// Primarily just initializes machine-dependent parameters in
+// class TargetMachine, and creates machine-dependent subclasses
+// for classes such as MachineInstrInfo.
+//---------------------------------------------------------------------------
+
+class UltraSparc : public TargetMachine {
+ UltraSparcInstrInfo InstInfo;
+ UltraSparcSchedInfo InstSchedulingInfo;
+public:
+ UltraSparc();
+ virtual ~UltraSparc() {}
+
+ virtual const MachineInstrInfo& getInstrInfo() const { return InstInfo; }
+
+ // compileMethod - For the sparc, we do instruction selection, followed by
+ // delay slot scheduling, then register allocation.
+ //
+ virtual bool compileMethod(Method *M);
+};
+
+
#endif
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