1 files changed, 4 insertions, 8 deletions
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index 5c0617438c4..48b4fecbf79 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -450,8 +450,8 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
   ResultVals.push_back(Chain);
   
   // Merge everything together with a MERGE_VALUES node.
-  return DAG.getNode(ISD::MERGE_VALUES, Op.Val->getVTList(),
-                     &ResultVals[0], ResultVals.size());
+  return DAG.getMergeValues(Op.Val->getVTList(), &ResultVals[0],
+                            ResultVals.size());
 }
 
 
@@ -829,8 +829,7 @@ static SDOperand LowerVAARG(SDOperand Op, SelectionDAG &DAG) {
     DAG.getNode(ISD::BIT_CONVERT, MVT::f64, V),
     V.getValue(1)
   };
-  return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(MVT::f64, MVT::Other),
-                     Ops, 2);
+  return DAG.getMergeValues(DAG.getVTList(MVT::f64, MVT::Other), Ops, 2);
 }
 
 static SDOperand LowerDYNAMIC_STACKALLOC(SDOperand Op, SelectionDAG &DAG) {
@@ -846,11 +845,8 @@ static SDOperand LowerDYNAMIC_STACKALLOC(SDOperand Op, SelectionDAG &DAG) {
   // to provide a register spill area.
   SDOperand NewVal = DAG.getNode(ISD::ADD, MVT::i32, NewSP,
                                  DAG.getConstant(96, MVT::i32));
-  std::vector<MVT> Tys;
-  Tys.push_back(MVT::i32);
-  Tys.push_back(MVT::Other);
   SDOperand Ops[2] = { NewVal, Chain };
-  return DAG.getNode(ISD::MERGE_VALUES, Tys, Ops, 2);
+  return DAG.getMergeValues(DAG.getVTList(MVT::i32, MVT::Other), Ops, 2);
 }