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-rw-r--r--llvm/lib/Target/Sparc/EmitAssembly.cpp19
1 files changed, 17 insertions, 2 deletions
diff --git a/llvm/lib/Target/Sparc/EmitAssembly.cpp b/llvm/lib/Target/Sparc/EmitAssembly.cpp
index f66b36f9be4..829a3b8bb31 100644
--- a/llvm/lib/Target/Sparc/EmitAssembly.cpp
+++ b/llvm/lib/Target/Sparc/EmitAssembly.cpp
@@ -393,12 +393,27 @@ SparcFunctionAsmPrinter::printOneOperand(const MachineOperand &mop,
switch (mop.getType())
{
- case MachineOperand::MO_VirtualRegister:
case MachineOperand::MO_CCRegister:
+ {
+ // We need to print %icc or %xcc as %ccr for certain opcodes.
+ int regNum = (int)mop.getAllocatedRegNum();
+ if (regNum != Target.getRegInfo().getInvalidRegNum() &&
+ Target.getRegInfo().getRegClassIDOfReg(regNum)
+ == UltraSparcRegInfo::IntCCRegClassID)
+ {
+ if (opCode == V9::RDCCR || opCode == V9::WRCCRi || opCode == V9::WRCCRr)
+ {
+ toAsm << "%" << Target.getRegInfo().getMachineRegClass(UltraSparcRegInfo::IntCCRegClassID)->getRegName(SparcIntCCRegClass::ccr);
+ break;
+ }
+ }
+ // all other cases can be handled like any other register
+ }
+
+ case MachineOperand::MO_VirtualRegister:
case MachineOperand::MO_MachineRegister:
{
int regNum = (int)mop.getAllocatedRegNum();
-
if (regNum == Target.getRegInfo().getInvalidRegNum()) {
// better to print code with NULL registers than to die
toAsm << "<NULL VALUE>";
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