diff options
Diffstat (limited to 'llvm/lib/Target/RISCV/MCTargetDesc')
4 files changed, 132 insertions, 6 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp index 49239ac9099..7672fea5d95 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp @@ -8,6 +8,7 @@ //===----------------------------------------------------------------------===// #include "RISCVAsmBackend.h" +#include "RISCVMCExpr.h" #include "llvm/ADT/APInt.h" #include "llvm/MC/MCAssembler.h" #include "llvm/MC/MCContext.h" @@ -21,6 +22,44 @@ using namespace llvm; +// If linker relaxation is enabled, or the relax option had previously been +// enabled, always emit relocations even if the fixup can be resolved. This is +// necessary for correctness as offsets may change during relaxation. +bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm, + const MCFixup &Fixup, + const MCValue &Target) { + bool ShouldForce = false; + + switch ((unsigned)Fixup.getKind()) { + default: + break; + case RISCV::fixup_riscv_pcrel_lo12_i: + case RISCV::fixup_riscv_pcrel_lo12_s: + // For pcrel_lo12, force a relocation if the target of the corresponding + // pcrel_hi20 is not in the same fragment. + const MCFixup *T = cast<RISCVMCExpr>(Fixup.getValue())->getPCRelHiFixup(); + if (!T) { + Asm.getContext().reportError(Fixup.getLoc(), + "could not find corresponding %pcrel_hi"); + return false; + } + + switch ((unsigned)T->getKind()) { + default: + llvm_unreachable("Unexpected fixup kind for pcrel_lo12"); + break; + case RISCV::fixup_riscv_pcrel_hi20: + ShouldForce = T->getValue()->findAssociatedFragment() != + Fixup.getValue()->findAssociatedFragment(); + break; + } + break; + } + + return ShouldForce || STI.getFeatureBits()[RISCV::FeatureRelax] || + ForceRelocs; +} + bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved, uint64_t Value, diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h index 5601f07f926..b98e45f4053 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h @@ -49,13 +49,8 @@ public: std::unique_ptr<MCObjectTargetWriter> createObjectTargetWriter() const override; - // If linker relaxation is enabled, or the relax option had previously been - // enabled, always emit relocations even if the fixup can be resolved. This is - // necessary for correctness as offsets may change during relaxation. bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, - const MCValue &Target) override { - return STI.getFeatureBits()[RISCV::FeatureRelax] || ForceRelocs; - } + const MCValue &Target) override; bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp index ad8357f9cfc..53648a5922c 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp @@ -14,6 +14,7 @@ #include "RISCV.h" #include "RISCVMCExpr.h" +#include "RISCVFixupKinds.h" #include "llvm/MC/MCAssembler.h" #include "llvm/MC/MCContext.h" #include "llvm/MC/MCStreamer.h" @@ -40,9 +41,90 @@ void RISCVMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const { OS << ')'; } +const MCFixup *RISCVMCExpr::getPCRelHiFixup() const { + MCValue AUIPCLoc; + if (!getSubExpr()->evaluateAsRelocatable(AUIPCLoc, nullptr, nullptr)) + return nullptr; + + const MCSymbolRefExpr *AUIPCSRE = AUIPCLoc.getSymA(); + if (!AUIPCSRE) + return nullptr; + + const auto *DF = + dyn_cast_or_null<MCDataFragment>(AUIPCSRE->findAssociatedFragment()); + if (!DF) + return nullptr; + + const MCSymbol *AUIPCSymbol = &AUIPCSRE->getSymbol(); + for (const MCFixup &F : DF->getFixups()) { + if (F.getOffset() != AUIPCSymbol->getOffset()) + continue; + + switch ((unsigned)F.getKind()) { + default: + continue; + case RISCV::fixup_riscv_pcrel_hi20: + return &F; + } + } + + return nullptr; +} + +bool RISCVMCExpr::evaluatePCRelLo(MCValue &Res, const MCAsmLayout *Layout, + const MCFixup *Fixup) const { + // VK_RISCV_PCREL_LO has to be handled specially. The MCExpr inside is + // actually the location of a auipc instruction with a VK_RISCV_PCREL_HI fixup + // pointing to the real target. We need to generate an MCValue in the form of + // (<real target> + <offset from this fixup to the auipc fixup>). The Fixup + // is pcrel relative to the VK_RISCV_PCREL_LO fixup, so we need to add the + // offset to the VK_RISCV_PCREL_HI Fixup from VK_RISCV_PCREL_LO to correct. + MCValue AUIPCLoc; + if (!getSubExpr()->evaluateAsValue(AUIPCLoc, *Layout)) + return false; + + const MCSymbolRefExpr *AUIPCSRE = AUIPCLoc.getSymA(); + // Don't try to evaluate %pcrel_hi/%pcrel_lo pairs that cross fragment + // boundries. + if (!AUIPCSRE || + findAssociatedFragment() != AUIPCSRE->findAssociatedFragment()) + return false; + + const MCSymbol *AUIPCSymbol = &AUIPCSRE->getSymbol(); + if (!AUIPCSymbol) + return false; + + const MCFixup *TargetFixup = getPCRelHiFixup(); + if (!TargetFixup) + return false; + + if ((unsigned)TargetFixup->getKind() != RISCV::fixup_riscv_pcrel_hi20) + return false; + + MCValue Target; + if (!TargetFixup->getValue()->evaluateAsValue(Target, *Layout)) + return false; + + if (!Target.getSymA() || !Target.getSymA()->getSymbol().isInSection()) + return false; + + if (&Target.getSymA()->getSymbol().getSection() != + findAssociatedFragment()->getParent()) + return false; + + uint64_t AUIPCOffset = AUIPCSymbol->getOffset(); + + Res = MCValue::get(Target.getSymA(), nullptr, + Target.getConstant() + (Fixup->getOffset() - AUIPCOffset)); + return true; +} + bool RISCVMCExpr::evaluateAsRelocatableImpl(MCValue &Res, const MCAsmLayout *Layout, const MCFixup *Fixup) const { + if (Kind == VK_RISCV_PCREL_LO && evaluatePCRelLo(Res, Layout, Fixup)) + return true; + if (!getSubExpr()->evaluateAsRelocatable(Res, Layout, Fixup)) return false; diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h index d2e0f6b6cda..4eafcc08b51 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h @@ -39,6 +39,9 @@ private: int64_t evaluateAsInt64(int64_t Value) const; + bool evaluatePCRelLo(MCValue &Res, const MCAsmLayout *Layout, + const MCFixup *Fixup) const; + explicit RISCVMCExpr(const MCExpr *Expr, VariantKind Kind) : Expr(Expr), Kind(Kind) {} @@ -50,6 +53,13 @@ public: const MCExpr *getSubExpr() const { return Expr; } + /// Get the MCExpr of the VK_RISCV_PCREL_HI Fixup that the + /// VK_RISCV_PCREL_LO points to. + /// + /// \returns nullptr if this isn't a VK_RISCV_PCREL_LO pointing to a + /// VK_RISCV_PCREL_HI. + const MCFixup *getPCRelHiFixup() const; + void printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const override; bool evaluateAsRelocatableImpl(MCValue &Res, const MCAsmLayout *Layout, const MCFixup *Fixup) const override; |
