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-rw-r--r--llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index af4ee415083..d5d464ecf7d 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -230,7 +230,8 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
Value = (Sbit << 31) | (Mid6 << 25) | (Lo4 << 8) | (Hi1 << 7);
return Value;
}
- case RISCV::fixup_riscv_call: {
+ case RISCV::fixup_riscv_call:
+ case RISCV::fixup_riscv_call_plt: {
// Jalr will add UpperImm with the sign-extended 12-bit LowerImm,
// we need to add 0x800ULL before extract upper bits to reflect the
// effect of the sign extension.
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