diff options
Diffstat (limited to 'llvm/lib/Target/R600')
| -rw-r--r-- | llvm/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp index 41f7494d674..d54412c465e 100644 --- a/llvm/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp @@ -321,7 +321,7 @@ public: : MCTargetAsmParser(), STI(STI), MII(MII), Parser(_Parser), ForcedEncodingSize(0){ - if (STI.getFeatureBits().none()) { + if (!STI.getFeatureBits()) { // Set default features. STI.ToggleFeature("SOUTHERN_ISLANDS"); } diff --git a/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp b/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp index 404663416f5..fa25f590f23 100644 --- a/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp +++ b/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp @@ -99,7 +99,7 @@ void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, } else if (IS_VTX(Desc)) { uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups, STI); uint32_t InstWord2 = MI.getOperand(2).getImm(); // Offset - if (!(STI.getFeatureBits()[AMDGPU::FeatureCaymanISA])) { + if (!(STI.getFeatureBits() & AMDGPU::FeatureCaymanISA)) { InstWord2 |= 1 << 19; // Mega-Fetch bit } @@ -132,7 +132,7 @@ void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, Emit((uint32_t) 0, OS); } else { uint64_t Inst = getBinaryCodeForInstr(MI, Fixups, STI); - if ((STI.getFeatureBits()[AMDGPU::FeatureR600ALUInst]) && + if ((STI.getFeatureBits() & AMDGPU::FeatureR600ALUInst) && ((Desc.TSFlags & R600_InstFlag::OP1) || Desc.TSFlags & R600_InstFlag::OP2)) { uint64_t ISAOpCode = Inst & (0x3FFULL << 39); |
