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-rw-r--r--llvm/lib/Target/R600/AMDGPUTargetMachine.cpp29
-rw-r--r--llvm/lib/Target/R600/AMDGPUTargetMachine.h10
2 files changed, 20 insertions, 19 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp
index bb5d9e99ff4..d65c010888a 100644
--- a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp
@@ -65,15 +65,15 @@ static std::string computeDataLayout(const Triple &TT) {
return Ret;
}
-AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT,
+AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM,
CodeGenOpt::Level OptLevel)
- : LLVMTargetMachine(T, computeDataLayout(Triple(TT)), TT, CPU, FS, Options,
- RM, CM, OptLevel),
- TLOF(new TargetLoweringObjectFileELF()),
- Subtarget(Triple(TT), CPU, FS, *this), IntrinsicInfo() {
+ : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM,
+ OptLevel),
+ TLOF(new TargetLoweringObjectFileELF()), Subtarget(TT, CPU, FS, *this),
+ IntrinsicInfo() {
setRequiresStructuredCFG(true);
initAsmInfo();
}
@@ -86,20 +86,21 @@ AMDGPUTargetMachine::~AMDGPUTargetMachine() {
// R600 Target Machine (R600 -> Cayman)
//===----------------------------------------------------------------------===//
-R600TargetMachine::R600TargetMachine(const Target &T, StringRef TT, StringRef FS,
- StringRef CPU, TargetOptions Options, Reloc::Model RM,
- CodeModel::Model CM, CodeGenOpt::Level OL) :
- AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { }
-
+R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
+ StringRef FS, StringRef CPU,
+ TargetOptions Options, Reloc::Model RM,
+ CodeModel::Model CM, CodeGenOpt::Level OL)
+ : AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) {}
//===----------------------------------------------------------------------===//
// GCN Target Machine (SI+)
//===----------------------------------------------------------------------===//
-GCNTargetMachine::GCNTargetMachine(const Target &T, StringRef TT, StringRef FS,
- StringRef CPU, TargetOptions Options, Reloc::Model RM,
- CodeModel::Model CM, CodeGenOpt::Level OL) :
- AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { }
+GCNTargetMachine::GCNTargetMachine(const Target &T, const Triple &TT,
+ StringRef FS, StringRef CPU,
+ TargetOptions Options, Reloc::Model RM,
+ CodeModel::Model CM, CodeGenOpt::Level OL)
+ : AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) {}
//===----------------------------------------------------------------------===//
// AMDGPU Pass Setup
diff --git a/llvm/lib/Target/R600/AMDGPUTargetMachine.h b/llvm/lib/Target/R600/AMDGPUTargetMachine.h
index 785c119a102..14792e347a7 100644
--- a/llvm/lib/Target/R600/AMDGPUTargetMachine.h
+++ b/llvm/lib/Target/R600/AMDGPUTargetMachine.h
@@ -37,7 +37,7 @@ protected:
AMDGPUIntrinsicInfo IntrinsicInfo;
public:
- AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
+ AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef FS,
StringRef CPU, TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM, CodeGenOpt::Level OL);
~AMDGPUTargetMachine();
@@ -63,7 +63,7 @@ public:
class R600TargetMachine : public AMDGPUTargetMachine {
public:
- R600TargetMachine(const Target &T, StringRef TT, StringRef FS,
+ R600TargetMachine(const Target &T, const Triple &TT, StringRef FS,
StringRef CPU, TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM, CodeGenOpt::Level OL);
@@ -77,9 +77,9 @@ public:
class GCNTargetMachine : public AMDGPUTargetMachine {
public:
- GCNTargetMachine(const Target &T, StringRef TT, StringRef FS,
- StringRef CPU, TargetOptions Options, Reloc::Model RM,
- CodeModel::Model CM, CodeGenOpt::Level OL);
+ GCNTargetMachine(const Target &T, const Triple &TT, StringRef FS,
+ StringRef CPU, TargetOptions Options, Reloc::Model RM,
+ CodeModel::Model CM, CodeGenOpt::Level OL);
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
};
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