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-rw-r--r--llvm/lib/Target/R600/SIDefines.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/SIDefines.h b/llvm/lib/Target/R600/SIDefines.h
index 82e9a859894..73a9c73d8e7 100644
--- a/llvm/lib/Target/R600/SIDefines.h
+++ b/llvm/lib/Target/R600/SIDefines.h
@@ -8,6 +8,8 @@
/// \file
//===----------------------------------------------------------------------===//
+#include "llvm/MC/MCInstrDesc.h"
+
#ifndef LLVM_LIB_TARGET_R600_SIDEFINES_H
#define LLVM_LIB_TARGET_R600_SIDEFINES_H
@@ -37,6 +39,17 @@ enum {
};
}
+namespace llvm {
+namespace AMDGPU {
+ enum OperandType {
+ /// Operand with register or 32-bit immediate
+ OPERAND_REG_IMM32 = llvm::MCOI::OPERAND_FIRST_TARGET,
+ /// Operand with register or inline constant
+ OPERAND_REG_INLINE_C
+ };
+}
+}
+
namespace SIInstrFlags {
enum Flags {
// First 4 bits are the instruction encoding
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