diff options
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrVSX.td | 12 |
2 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index 074fa815293..a7231bd2e2c 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -326,7 +326,7 @@ def immZExt16 : PatLeaf<(imm), [{ // field. Used by instructions like 'ori'. return (uint64_t)N->getZExtValue() == (unsigned short)N->getZExtValue(); }], LO16>; -def immSExt8 : ImmLeaf<i32, [{ return isInt<8>(Imm); }]>; +def immAnyExt8 : ImmLeaf<i32, [{ return isInt<8>(Imm) || isUInt<8>(Imm); }]>; def immSExt5NonZero : ImmLeaf<i32, [{ return Imm && isInt<5>(Imm); }]>; // imm16Shifted* - These match immediates where the low 16-bits are zero. There diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td index dcb49b0b024..0d9e3459f47 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td +++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td @@ -2865,12 +2865,12 @@ let AddedComplexity = 400 in { (v4i32 (MTVSRWS $A))>; def : Pat<(v4i32 (build_vector i32:$A, i32:$A, i32:$A, i32:$A)), (v4i32 (MTVSRWS $A))>; - def : Pat<(v16i8 (build_vector immSExt8:$A, immSExt8:$A, immSExt8:$A, - immSExt8:$A, immSExt8:$A, immSExt8:$A, - immSExt8:$A, immSExt8:$A, immSExt8:$A, - immSExt8:$A, immSExt8:$A, immSExt8:$A, - immSExt8:$A, immSExt8:$A, immSExt8:$A, - immSExt8:$A)), + def : Pat<(v16i8 (build_vector immAnyExt8:$A, immAnyExt8:$A, immAnyExt8:$A, + immAnyExt8:$A, immAnyExt8:$A, immAnyExt8:$A, + immAnyExt8:$A, immAnyExt8:$A, immAnyExt8:$A, + immAnyExt8:$A, immAnyExt8:$A, immAnyExt8:$A, + immAnyExt8:$A, immAnyExt8:$A, immAnyExt8:$A, + immAnyExt8:$A)), (v16i8 (COPY_TO_REGCLASS (XXSPLTIB imm:$A), VSRC))>; def : Pat<(v16i8 immAllOnesV), (v16i8 (COPY_TO_REGCLASS (XXSPLTIB 255), VSRC))>; |
