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-rw-r--r--llvm/lib/Target/PowerPC/PPCSubtarget.cpp35
1 files changed, 8 insertions, 27 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index 1b5f43c7755..c0cbfd779cb 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -175,27 +175,8 @@ bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV) const {
return false;
}
-// Embedded cores need aggressive scheduling (and some others also benefit).
-static bool needsAggressiveScheduling(unsigned Directive) {
- switch (Directive) {
- default: return false;
- case PPC::DIR_440:
- case PPC::DIR_A2:
- case PPC::DIR_E500mc:
- case PPC::DIR_E5500:
- case PPC::DIR_PWR7:
- case PPC::DIR_PWR8:
- // FIXME: Same as P8 until POWER9 scheduling info is available
- case PPC::DIR_PWR9:
- return true;
- }
-}
-
bool PPCSubtarget::enableMachineScheduler() const {
- // Enable MI scheduling for the embedded cores.
- // FIXME: Enable this for all cores (some additional modeling
- // may be necessary).
- return needsAggressiveScheduling(DarwinDirective);
+ return true;
}
// This overrides the PostRAScheduler bit in the SchedModel for each CPU.
@@ -213,19 +194,19 @@ void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
unsigned NumRegionInstrs) const {
- if (needsAggressiveScheduling(DarwinDirective)) {
- Policy.OnlyTopDown = false;
- Policy.OnlyBottomUp = false;
- }
-
+ // The GenericScheduler that we use defaults to scheduling bottom up only.
+ // We want to schedule from both the top and the bottom and so we set
+ // OnlyBottomUp to false.
+ // We want to do bi-directional scheduling since it provides a more balanced
+ // schedule leading to better performance.
+ Policy.OnlyBottomUp = false;
// Spilling is generally expensive on all PPC cores, so always enable
// register-pressure tracking.
Policy.ShouldTrackPressure = true;
}
bool PPCSubtarget::useAA() const {
- // Use AA during code generation for the embedded cores.
- return needsAggressiveScheduling(DarwinDirective);
+ return true;
}
bool PPCSubtarget::enableSubRegLiveness() const {
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