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-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrInfo.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.h b/llvm/lib/Target/PowerPC/PPCInstrInfo.h
index b318b177676..e2d6346aa53 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.h
@@ -106,7 +106,7 @@ public:
UseNode, UseIdx);
}
- bool hasLowDefLatency(const InstrItineraryData *ItinData,
+ bool hasLowDefLatency(const TargetSchedModel &SchedModel,
const MachineInstr *DefMI,
unsigned DefIdx) const override {
// Machine LICM should hoist all instructions in low-register-pressure
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