diff options
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 77 |
1 files changed, 47 insertions, 30 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 07ea66237d6..41042e26f3f 100644 --- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -1812,11 +1812,14 @@ class BitPermutationSelector { SDValue ANDIVal, ANDISVal; if (ANDIMask != 0) - ANDIVal = SDValue(CurDAG->getMachineNode(PPC::ANDIo, dl, MVT::i32, - VRot, getI32Imm(ANDIMask, dl)), 0); + ANDIVal = SDValue(CurDAG->getMachineNode(PPC::ANDI_rec, dl, MVT::i32, + VRot, getI32Imm(ANDIMask, dl)), + 0); if (ANDISMask != 0) - ANDISVal = SDValue(CurDAG->getMachineNode(PPC::ANDISo, dl, MVT::i32, - VRot, getI32Imm(ANDISMask, dl)), 0); + ANDISVal = + SDValue(CurDAG->getMachineNode(PPC::ANDIS_rec, dl, MVT::i32, VRot, + getI32Imm(ANDISMask, dl)), + 0); SDValue TotalVal; if (!ANDIVal) @@ -1905,11 +1908,14 @@ class BitPermutationSelector { SDValue ANDIVal, ANDISVal; if (ANDIMask != 0) - ANDIVal = SDValue(CurDAG->getMachineNode(PPC::ANDIo, dl, MVT::i32, - Res, getI32Imm(ANDIMask, dl)), 0); + ANDIVal = SDValue(CurDAG->getMachineNode(PPC::ANDI_rec, dl, MVT::i32, + Res, getI32Imm(ANDIMask, dl)), + 0); if (ANDISMask != 0) - ANDISVal = SDValue(CurDAG->getMachineNode(PPC::ANDISo, dl, MVT::i32, - Res, getI32Imm(ANDISMask, dl)), 0); + ANDISVal = + SDValue(CurDAG->getMachineNode(PPC::ANDIS_rec, dl, MVT::i32, Res, + getI32Imm(ANDISMask, dl)), + 0); if (!ANDIVal) Res = ANDISVal; @@ -2182,15 +2188,16 @@ class BitPermutationSelector { SDValue ANDIVal, ANDISVal; if (ANDIMask != 0) - ANDIVal = SDValue(CurDAG->getMachineNode(PPC::ANDI8o, dl, MVT::i64, + ANDIVal = SDValue(CurDAG->getMachineNode(PPC::ANDI8_rec, dl, MVT::i64, ExtendToInt64(VRot, dl), getI32Imm(ANDIMask, dl)), 0); if (ANDISMask != 0) - ANDISVal = SDValue(CurDAG->getMachineNode(PPC::ANDIS8o, dl, MVT::i64, - ExtendToInt64(VRot, dl), - getI32Imm(ANDISMask, dl)), - 0); + ANDISVal = + SDValue(CurDAG->getMachineNode(PPC::ANDIS8_rec, dl, MVT::i64, + ExtendToInt64(VRot, dl), + getI32Imm(ANDISMask, dl)), + 0); if (!ANDIVal) TotalVal = ANDISVal; @@ -2331,11 +2338,16 @@ class BitPermutationSelector { SDValue ANDIVal, ANDISVal; if (ANDIMask != 0) - ANDIVal = SDValue(CurDAG->getMachineNode(PPC::ANDI8o, dl, MVT::i64, - ExtendToInt64(Res, dl), getI32Imm(ANDIMask, dl)), 0); + ANDIVal = SDValue(CurDAG->getMachineNode(PPC::ANDI8_rec, dl, MVT::i64, + ExtendToInt64(Res, dl), + getI32Imm(ANDIMask, dl)), + 0); if (ANDISMask != 0) - ANDISVal = SDValue(CurDAG->getMachineNode(PPC::ANDIS8o, dl, MVT::i64, - ExtendToInt64(Res, dl), getI32Imm(ANDISMask, dl)), 0); + ANDISVal = + SDValue(CurDAG->getMachineNode(PPC::ANDIS8_rec, dl, MVT::i64, + ExtendToInt64(Res, dl), + getI32Imm(ANDISMask, dl)), + 0); if (!ANDIVal) Res = ANDISVal; @@ -2624,8 +2636,9 @@ SDNode *IntegerCompareEliminator::tryLogicOpOfCompares(SDNode *N) { assert((NewOpc != -1 || !IsBitwiseNegate) && "No record form available for AND8/OR8/XOR8?"); WideOp = - SDValue(CurDAG->getMachineNode(NewOpc == -1 ? PPC::ANDI8o : NewOpc, dl, - MVT::i64, MVT::Glue, LHS, RHS), 0); + SDValue(CurDAG->getMachineNode(NewOpc == -1 ? PPC::ANDI8_rec : NewOpc, + dl, MVT::i64, MVT::Glue, LHS, RHS), + 0); } // Select this node to a single bit from CR0 set by the record-form node @@ -4820,24 +4833,24 @@ void PPCDAGToDAGISel::Select(SDNode *N) { break; } // FIXME: Remove this once the ANDI glue bug is fixed: - case PPCISD::ANDIo_1_EQ_BIT: - case PPCISD::ANDIo_1_GT_BIT: { + case PPCISD::ANDI_rec_1_EQ_BIT: + case PPCISD::ANDI_rec_1_GT_BIT: { if (!ANDIGlueBug) break; EVT InVT = N->getOperand(0).getValueType(); assert((InVT == MVT::i64 || InVT == MVT::i32) && - "Invalid input type for ANDIo_1_EQ_BIT"); + "Invalid input type for ANDI_rec_1_EQ_BIT"); - unsigned Opcode = (InVT == MVT::i64) ? PPC::ANDI8o : PPC::ANDIo; + unsigned Opcode = (InVT == MVT::i64) ? PPC::ANDI8_rec : PPC::ANDI_rec; SDValue AndI(CurDAG->getMachineNode(Opcode, dl, InVT, MVT::Glue, N->getOperand(0), CurDAG->getTargetConstant(1, dl, InVT)), 0); SDValue CR0Reg = CurDAG->getRegister(PPC::CR0, MVT::i32); - SDValue SRIdxVal = - CurDAG->getTargetConstant(N->getOpcode() == PPCISD::ANDIo_1_EQ_BIT ? - PPC::sub_eq : PPC::sub_gt, dl, MVT::i32); + SDValue SRIdxVal = CurDAG->getTargetConstant( + N->getOpcode() == PPCISD::ANDI_rec_1_EQ_BIT ? PPC::sub_eq : PPC::sub_gt, + dl, MVT::i32); CurDAG->SelectNodeTo(N, TargetOpcode::EXTRACT_SUBREG, MVT::i1, CR0Reg, SRIdxVal, SDValue(AndI.getNode(), 1) /* glue */); @@ -6222,8 +6235,8 @@ static bool PeepholePPC64ZExtGather(SDValue Op32, // For ANDI and ANDIS, the higher-order bits are zero if either that is true // of the first operand, or if the second operand is positive (so that it is // not sign extended). - if (Op32.getMachineOpcode() == PPC::ANDIo || - Op32.getMachineOpcode() == PPC::ANDISo) { + if (Op32.getMachineOpcode() == PPC::ANDI_rec || + Op32.getMachineOpcode() == PPC::ANDIS_rec) { SmallPtrSet<SDNode *, 16> ToPromote1; bool Op0OK = PeepholePPC64ZExtGather(Op32.getOperand(0), ToPromote1); @@ -6345,8 +6358,12 @@ void PPCDAGToDAGISel::PeepholePPC64ZExt() { case PPC::ORI: NewOpcode = PPC::ORI8; break; case PPC::ORIS: NewOpcode = PPC::ORIS8; break; case PPC::AND: NewOpcode = PPC::AND8; break; - case PPC::ANDIo: NewOpcode = PPC::ANDI8o; break; - case PPC::ANDISo: NewOpcode = PPC::ANDIS8o; break; + case PPC::ANDI_rec: + NewOpcode = PPC::ANDI8_rec; + break; + case PPC::ANDIS_rec: + NewOpcode = PPC::ANDIS8_rec; + break; } // Note: During the replacement process, the nodes will be in an |