diff options
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCExpandISEL.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCExpandISEL.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp b/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp index 6151bee6133..a8b6b611620 100644 --- a/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp +++ b/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp @@ -117,7 +117,7 @@ public: /// instruction is still generated by default on targets that support them. /// /// \return true if ISEL should be expanded into if-then-else code sequence; - /// false if ISEL instruction should be generated, i.e. not expaned. + /// false if ISEL instruction should be generated, i.e. not expanded. /// static bool isExpandISELEnabled(const MachineFunction &MF); @@ -212,7 +212,7 @@ void PPCExpandISEL::expandAndMergeISELs() { // as it would be ISEL %R0, %ZERO, %R0, %CRN. if (useSameRegister(Dest, TrueValue) && useSameRegister(Dest, FalseValue)) { - LLVM_DEBUG(dbgs() << "Remove redudant ISEL instruction: " << **I + LLVM_DEBUG(dbgs() << "Remove redundant ISEL instruction: " << **I << "\n"); // FIXME: if the CR field used has no other uses, we could eliminate the // instruction that defines it. This would have to be done manually @@ -227,7 +227,7 @@ void PPCExpandISEL::expandAndMergeISELs() { // safe to fold ISEL to MR(OR) instead of ADDI. MachineBasicBlock *MBB = (*I)->getParent(); LLVM_DEBUG( - dbgs() << "Fold the ISEL instruction to an unconditonal copy:\n"); + dbgs() << "Fold the ISEL instruction to an unconditional copy:\n"); LLVM_DEBUG(dbgs() << "ISEL: " << **I << "\n"); NumFolded++; // Note: we're using both the TrueValue and FalseValue operands so as |
