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-rw-r--r--llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp
index e196a2bec6b..e5c2f40e3c2 100644
--- a/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp
+++ b/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp
@@ -218,8 +218,9 @@ PPC64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
std::pair<SDOperand, SDOperand>
PPC64TargetLowering::LowerCallTo(SDOperand Chain,
- const Type *RetTy, bool isVarArg,
- SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG) {
+ const Type *RetTy, bool isVarArg,
+ SDOperand Callee, ArgListTy &Args,
+ SelectionDAG &DAG) {
// args_to_use will accumulate outgoing args for the ISD::CALL case in
// SelectExpr to use to put the arguments in the appropriate registers.
std::vector<SDOperand> args_to_use;
@@ -1519,7 +1520,7 @@ void ISel::Select(SDOperand N) {
case 3:
assert(N.getOperand(1).getValueType() == MVT::i32 &&
N.getOperand(2).getValueType() == MVT::i32 &&
- "Unknown two-register value!");
+ "Unknown two-register value!");
Select(N.getOperand(0));
Tmp1 = SelectExpr(N.getOperand(1));
Tmp2 = SelectExpr(N.getOperand(2));
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