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-rw-r--r--llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp5
1 files changed, 0 insertions, 5 deletions
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
index 9fa5beb50c0..0f6385e0a67 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
@@ -105,13 +105,8 @@ public:
void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override {
- // For fast-isel, a float COPY_TO_REGCLASS can survive this long.
- // It's just a nop to keep the register classes happy, so don't
- // generate anything.
unsigned Opcode = MI.getOpcode();
const MCInstrDesc &Desc = MCII.get(Opcode);
- if (Opcode == TargetOpcode::COPY_TO_REGCLASS)
- return;
uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI);
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