diff options
Diffstat (limited to 'llvm/lib/Target/NVPTX')
| -rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp | 14 | ||||
| -rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp | 6 |
4 files changed, 9 insertions, 17 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp index 711b6f89d32..1264b25b04b 100644 --- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp @@ -1773,8 +1773,7 @@ void NVPTXAsmPrinter::setAndEmitFunctionVirtualRegisters( // Map the global virtual register number to a register class specific // virtual register number starting from 1 with that class. - const TargetRegisterInfo *TRI = - MF.getTarget().getSubtargetImpl()->getRegisterInfo(); + const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); //unsigned numRegClasses = TRI->getNumRegClasses(); // Emit the Fake Stack Object diff --git a/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp index 761715f5786..314df3828b8 100644 --- a/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp @@ -48,24 +48,20 @@ void NVPTXFrameLowering::emitPrologue(MachineFunction &MF) const { if (is64bit) { unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int64RegsRegClass); MachineInstr *MI = - BuildMI(MBB, MBBI, dl, - MF.getTarget().getSubtargetImpl()->getInstrInfo()->get( - NVPTX::cvta_local_yes_64), + BuildMI(MBB, MBBI, dl, MF.getSubtarget().getInstrInfo()->get( + NVPTX::cvta_local_yes_64), NVPTX::VRFrame).addReg(LocalReg); BuildMI(MBB, MI, dl, - MF.getTarget().getSubtargetImpl()->getInstrInfo()->get( - NVPTX::MOV_DEPOT_ADDR_64), + MF.getSubtarget().getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR_64), LocalReg).addImm(MF.getFunctionNumber()); } else { unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int32RegsRegClass); MachineInstr *MI = BuildMI(MBB, MBBI, dl, - MF.getTarget().getSubtargetImpl()->getInstrInfo()->get( - NVPTX::cvta_local_yes), + MF.getSubtarget().getInstrInfo()->get(NVPTX::cvta_local_yes), NVPTX::VRFrame).addReg(LocalReg); BuildMI(MBB, MI, dl, - MF.getTarget().getSubtargetImpl()->getInstrInfo()->get( - NVPTX::MOV_DEPOT_ADDR), + MF.getSubtarget().getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR), LocalReg).addImm(MF.getFunctionNumber()); } } diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp index 1e2d8712162..55951e64a38 100644 --- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp @@ -2028,8 +2028,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments( const Function *F = MF.getFunction(); const AttributeSet &PAL = F->getAttributes(); - const TargetLowering *TLI = - DAG.getTarget().getSubtargetImpl()->getTargetLowering(); + const TargetLowering *TLI = DAG.getSubtarget().getTargetLowering(); SDValue Root = DAG.getRoot(); std::vector<SDValue> OutChains; diff --git a/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp b/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp index 4db819795f7..a1e1b9e7448 100644 --- a/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp @@ -109,10 +109,8 @@ AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx, void NVPTXPrologEpilogPass::calculateFrameObjectOffsets(MachineFunction &Fn) { - const TargetFrameLowering &TFI = - *Fn.getTarget().getSubtargetImpl()->getFrameLowering(); - const TargetRegisterInfo *RegInfo = - Fn.getTarget().getSubtargetImpl()->getRegisterInfo(); + const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering(); + const TargetRegisterInfo *RegInfo = Fn.getSubtarget().getRegisterInfo(); bool StackGrowsDown = TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown; |
