diff options
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/CMakeLists.txt | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/Makefile | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/Mips.h | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/Mips16ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsCodeEmitter.cpp | 483 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsJITInfo.cpp | 286 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsJITInfo.h | 71 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsLongBranch.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSubtarget.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSubtarget.h | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsTargetMachine.cpp | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsTargetMachine.h | 4 |
15 files changed, 9 insertions, 862 deletions
diff --git a/llvm/lib/Target/Mips/CMakeLists.txt b/llvm/lib/Target/Mips/CMakeLists.txt index bf67d71b0a0..6028db68507 100644 --- a/llvm/lib/Target/Mips/CMakeLists.txt +++ b/llvm/lib/Target/Mips/CMakeLists.txt @@ -3,8 +3,7 @@ set(LLVM_TARGET_DEFINITIONS Mips.td) tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info) tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info) tablegen(LLVM MipsGenDisassemblerTables.inc -gen-disassembler) -tablegen(LLVM MipsGenCodeEmitter.inc -gen-emitter) -tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter -mc-emitter) +tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter) tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer) tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel) tablegen(LLVM MipsGenFastISel.inc -gen-fast-isel) @@ -24,11 +23,9 @@ add_llvm_target(MipsCodeGen Mips16RegisterInfo.cpp MipsAnalyzeImmediate.cpp MipsAsmPrinter.cpp - MipsCodeEmitter.cpp MipsConstantIslandPass.cpp MipsDelaySlotFiller.cpp MipsFastISel.cpp - MipsJITInfo.cpp MipsInstrInfo.cpp MipsISelDAGToDAG.cpp MipsISelLowering.cpp diff --git a/llvm/lib/Target/Mips/Makefile b/llvm/lib/Target/Mips/Makefile index 41efa470e42..56db450f696 100644 --- a/llvm/lib/Target/Mips/Makefile +++ b/llvm/lib/Target/Mips/Makefile @@ -13,7 +13,7 @@ TARGET = Mips # Make sure that tblgen is run, first thing. BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \ - MipsGenAsmWriter.inc MipsGenFastISel.inc MipsGenCodeEmitter.inc \ + MipsGenAsmWriter.inc MipsGenFastISel.inc \ MipsGenDAGISel.inc MipsGenCallingConv.inc \ MipsGenSubtargetInfo.inc MipsGenMCCodeEmitter.inc \ MipsGenDisassemblerTables.inc \ diff --git a/llvm/lib/Target/Mips/Mips.h b/llvm/lib/Target/Mips/Mips.h index d512d6589c4..387ef9f5ae4 100644 --- a/llvm/lib/Target/Mips/Mips.h +++ b/llvm/lib/Target/Mips/Mips.h @@ -26,8 +26,6 @@ namespace llvm { FunctionPass *createMipsOptimizePICCallPass(MipsTargetMachine &TM); FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM); FunctionPass *createMipsLongBranchPass(MipsTargetMachine &TM); - FunctionPass *createMipsJITCodeEmitterPass(MipsTargetMachine &TM, - JITCodeEmitter &JCE); FunctionPass *createMipsConstantIslandPass(MipsTargetMachine &tm); } // end namespace llvm; diff --git a/llvm/lib/Target/Mips/Mips16ISelLowering.cpp b/llvm/lib/Target/Mips/Mips16ISelLowering.cpp index 3ca0ffe23eb..8d9cb024a9e 100644 --- a/llvm/lib/Target/Mips/Mips16ISelLowering.cpp +++ b/llvm/lib/Target/Mips/Mips16ISelLowering.cpp @@ -12,6 +12,8 @@ //===----------------------------------------------------------------------===// #include "Mips16ISelLowering.h" #include "MCTargetDesc/MipsBaseInfo.h" +#include "Mips16HardFloatInfo.h" +#include "MipsMachineFunction.h" #include "MipsRegisterInfo.h" #include "MipsTargetMachine.h" #include "llvm/ADT/StringRef.h" diff --git a/llvm/lib/Target/Mips/MipsCodeEmitter.cpp b/llvm/lib/Target/Mips/MipsCodeEmitter.cpp deleted file mode 100644 index 3885bb96e4f..00000000000 --- a/llvm/lib/Target/Mips/MipsCodeEmitter.cpp +++ /dev/null @@ -1,483 +0,0 @@ -//===-- Mips/MipsCodeEmitter.cpp - Convert Mips Code to Machine Code ------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===---------------------------------------------------------------------===// -// -// This file contains the pass that transforms the Mips machine instructions -// into relocatable machine code. -// -//===---------------------------------------------------------------------===// - -#include "Mips.h" -#include "MCTargetDesc/MipsBaseInfo.h" -#include "MipsInstrInfo.h" -#include "MipsRelocations.h" -#include "MipsSubtarget.h" -#include "MipsTargetMachine.h" -#include "llvm/ADT/Statistic.h" -#include "llvm/CodeGen/JITCodeEmitter.h" -#include "llvm/CodeGen/MachineConstantPool.h" -#include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/MachineInstrBuilder.h" -#include "llvm/CodeGen/MachineJumpTableInfo.h" -#include "llvm/CodeGen/MachineModuleInfo.h" -#include "llvm/CodeGen/MachineOperand.h" -#include "llvm/CodeGen/Passes.h" -#include "llvm/IR/Constants.h" -#include "llvm/IR/DerivedTypes.h" -#include "llvm/PassManager.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/raw_ostream.h" -#ifndef NDEBUG -#include <iomanip> -#endif - -using namespace llvm; - -#define DEBUG_TYPE "jit" - -STATISTIC(NumEmitted, "Number of machine instructions emitted"); - -namespace { - -class MipsCodeEmitter : public MachineFunctionPass { - MipsJITInfo *JTI; - const MipsInstrInfo *II; - const DataLayout *TD; - const MipsSubtarget *Subtarget; - TargetMachine &TM; - JITCodeEmitter &MCE; - const std::vector<MachineConstantPoolEntry> *MCPEs; - const std::vector<MachineJumpTableEntry> *MJTEs; - bool IsPIC; - - void getAnalysisUsage(AnalysisUsage &AU) const override { - AU.addRequired<MachineModuleInfo> (); - MachineFunctionPass::getAnalysisUsage(AU); - } - - static char ID; - -public: - MipsCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce) - : MachineFunctionPass(ID), JTI(nullptr), II(nullptr), TD(nullptr), - TM(tm), MCE(mce), MCPEs(nullptr), MJTEs(nullptr), - IsPIC(TM.getRelocationModel() == Reloc::PIC_) {} - - bool runOnMachineFunction(MachineFunction &MF) override; - - const char *getPassName() const override { - return "Mips Machine Code Emitter"; - } - - /// getBinaryCodeForInstr - This function, generated by the - /// CodeEmitterGenerator using TableGen, produces the binary encoding for - /// machine instructions. - uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const; - - void emitInstruction(MachineBasicBlock::instr_iterator MI, - MachineBasicBlock &MBB); - -private: - - void emitWord(unsigned Word); - - /// Routines that handle operands which add machine relocations which are - /// fixed up by the relocation stage. - void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc, - bool MayNeedFarStub) const; - void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const; - void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const; - void emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const; - void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const; - - /// getMachineOpValue - Return binary encoding of operand. If the machine - /// operand requires relocation, record the relocation and return zero. - unsigned getMachineOpValue(const MachineInstr &MI, - const MachineOperand &MO) const; - - unsigned getRelocation(const MachineInstr &MI, - const MachineOperand &MO) const; - - unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const; - unsigned getJumpTargetOpValueMM(const MachineInstr &MI, unsigned OpNo) const; - unsigned getBranchTargetOpValueMM(const MachineInstr &MI, - unsigned OpNo) const; - - unsigned getBranchTarget21OpValue(const MachineInstr &MI, - unsigned OpNo) const; - unsigned getBranchTarget26OpValue(const MachineInstr &MI, - unsigned OpNo) const; - unsigned getJumpOffset16OpValue(const MachineInstr &MI, unsigned OpNo) const; - - unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const; - unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const; - unsigned getMemEncodingMMImm12(const MachineInstr &MI, unsigned OpNo) const; - unsigned getMSAMemEncoding(const MachineInstr &MI, unsigned OpNo) const; - unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const; - unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const; - unsigned getLSAImmEncoding(const MachineInstr &MI, unsigned OpNo) const; - unsigned getSimm19Lsl2Encoding(const MachineInstr &MI, unsigned OpNo) const; - unsigned getSimm18Lsl3Encoding(const MachineInstr &MI, unsigned OpNo) const; - - /// Expand pseudo instructions with accumulator register operands. - void expandACCInstr(MachineBasicBlock::instr_iterator MI, - MachineBasicBlock &MBB, unsigned Opc) const; - - void expandPseudoIndirectBranch(MachineBasicBlock::instr_iterator MI, - MachineBasicBlock &MBB) const; - - /// \brief Expand pseudo instruction. Return true if MI was expanded. - bool expandPseudos(MachineBasicBlock::instr_iterator &MI, - MachineBasicBlock &MBB) const; -}; -} - -char MipsCodeEmitter::ID = 0; - -bool MipsCodeEmitter::runOnMachineFunction(MachineFunction &MF) { - MipsTargetMachine &Target = static_cast<MipsTargetMachine &>( - const_cast<TargetMachine &>(MF.getTarget())); - // Initialize the subtarget so that we can grab the subtarget dependent - // variables from it. - Subtarget = &TM.getSubtarget<MipsSubtarget>(); - JTI = Target.getSubtargetImpl()->getJITInfo(); - II = Subtarget->getInstrInfo(); - TD = Subtarget->getDataLayout(); - MCPEs = &MF.getConstantPool()->getConstants(); - MJTEs = nullptr; - if (MF.getJumpTableInfo()) MJTEs = &MF.getJumpTableInfo()->getJumpTables(); - JTI->Initialize(MF, IsPIC, Subtarget->isLittle()); - MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ()); - - do { - DEBUG(errs() << "JITTing function '" - << MF.getName() << "'\n"); - MCE.startFunction(MF); - - for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); - MBB != E; ++MBB){ - MCE.StartMachineBasicBlock(MBB); - for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(), - E = MBB->instr_end(); I != E;) - emitInstruction(*I++, *MBB); - } - } while (MCE.finishFunction(MF)); - - return false; -} - -unsigned MipsCodeEmitter::getRelocation(const MachineInstr &MI, - const MachineOperand &MO) const { - // NOTE: This relocations are for static. - uint64_t TSFlags = MI.getDesc().TSFlags; - uint64_t Form = TSFlags & MipsII::FormMask; - if (Form == MipsII::FrmJ) - return Mips::reloc_mips_26; - if ((Form == MipsII::FrmI || Form == MipsII::FrmFI) - && MI.isBranch()) - return Mips::reloc_mips_pc16; - if (Form == MipsII::FrmI && MI.getOpcode() == Mips::LUi) - return Mips::reloc_mips_hi; - return Mips::reloc_mips_lo; -} - -unsigned MipsCodeEmitter::getJumpTargetOpValue(const MachineInstr &MI, - unsigned OpNo) const { - MachineOperand MO = MI.getOperand(OpNo); - if (MO.isGlobal()) - emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true); - else if (MO.isSymbol()) - emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO)); - else if (MO.isMBB()) - emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO)); - else - llvm_unreachable("Unexpected jump target operand kind."); - return 0; -} - -unsigned MipsCodeEmitter::getJumpTargetOpValueMM(const MachineInstr &MI, - unsigned OpNo) const { - llvm_unreachable("Unimplemented function."); - return 0; -} - -unsigned MipsCodeEmitter::getBranchTargetOpValueMM(const MachineInstr &MI, - unsigned OpNo) const { - llvm_unreachable("Unimplemented function."); - return 0; -} - -unsigned MipsCodeEmitter::getBranchTarget21OpValue(const MachineInstr &MI, - unsigned OpNo) const { - llvm_unreachable("Unimplemented function."); - return 0; -} - -unsigned MipsCodeEmitter::getBranchTarget26OpValue(const MachineInstr &MI, - unsigned OpNo) const { - llvm_unreachable("Unimplemented function."); - return 0; -} - -unsigned MipsCodeEmitter::getJumpOffset16OpValue(const MachineInstr &MI, - unsigned OpNo) const { - llvm_unreachable("Unimplemented function."); - return 0; -} - -unsigned MipsCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI, - unsigned OpNo) const { - MachineOperand MO = MI.getOperand(OpNo); - emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO)); - return 0; -} - -unsigned MipsCodeEmitter::getMemEncoding(const MachineInstr &MI, - unsigned OpNo) const { - // Base register is encoded in bits 20-16, offset is encoded in bits 15-0. - assert(MI.getOperand(OpNo).isReg()); - unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16; - return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits; -} - -unsigned MipsCodeEmitter::getMemEncodingMMImm12(const MachineInstr &MI, - unsigned OpNo) const { - llvm_unreachable("Unimplemented function."); - return 0; -} - -unsigned MipsCodeEmitter::getMSAMemEncoding(const MachineInstr &MI, - unsigned OpNo) const { - llvm_unreachable("Unimplemented function."); - return 0; -} - -unsigned MipsCodeEmitter::getSizeExtEncoding(const MachineInstr &MI, - unsigned OpNo) const { - // size is encoded as size-1. - return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1; -} - -unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI, - unsigned OpNo) const { - // size is encoded as pos+size-1. - return getMachineOpValue(MI, MI.getOperand(OpNo-1)) + - getMachineOpValue(MI, MI.getOperand(OpNo)) - 1; -} - -unsigned MipsCodeEmitter::getLSAImmEncoding(const MachineInstr &MI, - unsigned OpNo) const { - llvm_unreachable("Unimplemented function."); - return 0; -} - -unsigned MipsCodeEmitter::getSimm18Lsl3Encoding(const MachineInstr &MI, - unsigned OpNo) const { - llvm_unreachable("Unimplemented function."); - return 0; -} - -unsigned MipsCodeEmitter::getSimm19Lsl2Encoding(const MachineInstr &MI, - unsigned OpNo) const { - llvm_unreachable("Unimplemented function."); - return 0; -} - -/// getMachineOpValue - Return binary encoding of operand. If the machine -/// operand requires relocation, record the relocation and return zero. -unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI, - const MachineOperand &MO) const { - if (MO.isReg()) - return TM.getSubtargetImpl()->getRegisterInfo()->getEncodingValue( - MO.getReg()); - else if (MO.isImm()) - return static_cast<unsigned>(MO.getImm()); - else if (MO.isGlobal()) - emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true); - else if (MO.isSymbol()) - emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO)); - else if (MO.isCPI()) - emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO)); - else if (MO.isJTI()) - emitJumpTableAddress(MO.getIndex(), getRelocation(MI, MO)); - else if (MO.isMBB()) - emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO)); - else - llvm_unreachable("Unable to encode MachineOperand!"); - return 0; -} - -void MipsCodeEmitter::emitGlobalAddress(const GlobalValue *GV, unsigned Reloc, - bool MayNeedFarStub) const { - MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc, - const_cast<GlobalValue *>(GV), 0, - MayNeedFarStub)); -} - -void MipsCodeEmitter:: -emitExternalSymbolAddress(const char *ES, unsigned Reloc) const { - MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(), - Reloc, ES, 0, 0)); -} - -void MipsCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) const { - MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(), - Reloc, CPI, 0, false)); -} - -void MipsCodeEmitter:: -emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const { - MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(), - Reloc, JTIndex, 0, false)); -} - -void MipsCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB, - unsigned Reloc) const { - MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), - Reloc, BB)); -} - -void MipsCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI, - MachineBasicBlock &MBB) { - DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI); - - // Expand pseudo instruction. Skip if MI was not expanded. - if (((MI->getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo) && - !expandPseudos(MI, MBB)) - return; - - MCE.processDebugLoc(MI->getDebugLoc(), true); - - emitWord(getBinaryCodeForInstr(*MI)); - ++NumEmitted; // Keep track of the # of mi's emitted - - MCE.processDebugLoc(MI->getDebugLoc(), false); -} - -void MipsCodeEmitter::emitWord(unsigned Word) { - DEBUG(errs() << " 0x"; - errs().write_hex(Word) << "\n"); - if (Subtarget->isLittle()) - MCE.emitWordLE(Word); - else - MCE.emitWordBE(Word); -} - -void MipsCodeEmitter::expandACCInstr(MachineBasicBlock::instr_iterator MI, - MachineBasicBlock &MBB, - unsigned Opc) const { - // Expand "pseudomult $ac0, $t0, $t1" to "mult $t0, $t1". - BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opc)) - .addReg(MI->getOperand(1).getReg()).addReg(MI->getOperand(2).getReg()); -} - -void MipsCodeEmitter::expandPseudoIndirectBranch( - MachineBasicBlock::instr_iterator MI, MachineBasicBlock &MBB) const { - // This logic is duplicated from MipsAsmPrinter::emitPseudoIndirectBranch() - bool HasLinkReg = false; - unsigned Opcode = 0; - - if (Subtarget->hasMips64r6()) { - // MIPS64r6 should use (JALR64 ZERO_64, $rs) - Opcode = Mips::JALR64; - HasLinkReg = true; - } else if (Subtarget->hasMips32r6()) { - // MIPS32r6 should use (JALR ZERO, $rs) - Opcode = Mips::JALR; - HasLinkReg = true; - } else if (Subtarget->inMicroMipsMode()) - // microMIPS should use (JR_MM $rs) - Opcode = Mips::JR_MM; - else { - // Everything else should use (JR $rs) - Opcode = Mips::JR; - } - - auto MIB = BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opcode)); - - if (HasLinkReg) { - unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO; - MIB.addReg(ZeroReg); - } - - MIB.addReg(MI->getOperand(0).getReg()); -} - -bool MipsCodeEmitter::expandPseudos(MachineBasicBlock::instr_iterator &MI, - MachineBasicBlock &MBB) const { - switch (MI->getOpcode()) { - default: - llvm_unreachable("Unhandled pseudo"); - return false; - case Mips::NOP: - BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::SLL), Mips::ZERO) - .addReg(Mips::ZERO).addImm(0); - break; - case Mips::B: - BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BEQ)).addReg(Mips::ZERO) - .addReg(Mips::ZERO).addOperand(MI->getOperand(0)); - break; - case Mips::TRAP: - BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BREAK)).addImm(0) - .addImm(0); - break; - case Mips::JALRPseudo: - BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::JALR), Mips::RA) - .addReg(MI->getOperand(0).getReg()); - break; - case Mips::PseudoMULT: - expandACCInstr(MI, MBB, Mips::MULT); - break; - case Mips::PseudoMULTu: - expandACCInstr(MI, MBB, Mips::MULTu); - break; - case Mips::PseudoSDIV: - expandACCInstr(MI, MBB, Mips::SDIV); - break; - case Mips::PseudoUDIV: - expandACCInstr(MI, MBB, Mips::UDIV); - break; - case Mips::PseudoMADD: - expandACCInstr(MI, MBB, Mips::MADD); - break; - case Mips::PseudoMADDU: - expandACCInstr(MI, MBB, Mips::MADDU); - break; - case Mips::PseudoMSUB: - expandACCInstr(MI, MBB, Mips::MSUB); - break; - case Mips::PseudoMSUBU: - expandACCInstr(MI, MBB, Mips::MSUBU); - break; - case Mips::PseudoReturn: - case Mips::PseudoReturn64: - case Mips::PseudoIndirectBranch: - case Mips::PseudoIndirectBranch64: - expandPseudoIndirectBranch(MI, MBB); - break; - case TargetOpcode::CFI_INSTRUCTION: - case TargetOpcode::IMPLICIT_DEF: - case TargetOpcode::KILL: - // Do nothing - return false; - } - - (MI--)->eraseFromBundle(); - return true; -} - -/// createMipsJITCodeEmitterPass - Return a pass that emits the collected Mips -/// code to the specified MCE object. -FunctionPass *llvm::createMipsJITCodeEmitterPass(MipsTargetMachine &TM, - JITCodeEmitter &JCE) { - return new MipsCodeEmitter(TM, JCE); -} - -#include "MipsGenCodeEmitter.inc" diff --git a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp index 57c20a6cf48..f40e53a34d8 100644 --- a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp +++ b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp @@ -28,6 +28,7 @@ #include "MipsTargetMachine.h" #include "llvm/ADT/Statistic.h" #include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 416de552b4a..ddbb2324e9a 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -24,6 +24,7 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineJumpTableInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/CodeGen/ValueTypes.h" diff --git a/llvm/lib/Target/Mips/MipsJITInfo.cpp b/llvm/lib/Target/Mips/MipsJITInfo.cpp deleted file mode 100644 index 2072488206a..00000000000 --- a/llvm/lib/Target/Mips/MipsJITInfo.cpp +++ /dev/null @@ -1,286 +0,0 @@ -//===-- MipsJITInfo.cpp - Implement the Mips JIT Interface ----------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements the JIT interfaces for the Mips target. -// -//===----------------------------------------------------------------------===// - -#include "MipsJITInfo.h" -#include "MipsInstrInfo.h" -#include "MipsRelocations.h" -#include "MipsSubtarget.h" -#include "llvm/CodeGen/JITCodeEmitter.h" -#include "llvm/IR/Function.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/Memory.h" -#include "llvm/Support/raw_ostream.h" -#include <cstdlib> -using namespace llvm; - -#define DEBUG_TYPE "jit" - - -void MipsJITInfo::replaceMachineCodeForFunction(void *Old, void *New) { - unsigned NewAddr = (intptr_t)New; - unsigned OldAddr = (intptr_t)Old; - const unsigned NopInstr = 0x0; - - // If the functions are in the same memory segment, insert PC-region branch. - if ((NewAddr & 0xF0000000) == ((OldAddr + 4) & 0xF0000000)) { - unsigned *OldInstruction = (unsigned *)Old; - *OldInstruction = 0x08000000; - unsigned JTargetAddr = NewAddr & 0x0FFFFFFC; - - JTargetAddr >>= 2; - *OldInstruction |= JTargetAddr; - - // Insert a NOP. - OldInstruction++; - *OldInstruction = NopInstr; - - sys::Memory::InvalidateInstructionCache(Old, 2 * 4); - } else { - // We need to clear hint bits from the instruction, in case it is 'jr ra'. - const unsigned HintMask = 0xFFFFF83F, ReturnSequence = 0x03e00008; - unsigned* CurrentInstr = (unsigned*)Old; - unsigned CurrInstrHintClear = (*CurrentInstr) & HintMask; - unsigned* NextInstr = CurrentInstr + 1; - unsigned NextInstrHintClear = (*NextInstr) & HintMask; - - // Do absolute jump if there are 2 or more instructions before return from - // the old function. - if ((CurrInstrHintClear != ReturnSequence) && - (NextInstrHintClear != ReturnSequence)) { - const unsigned LuiT0Instr = 0x3c080000, AddiuT0Instr = 0x25080000; - const unsigned JrT0Instr = 0x01000008; - // lui t0, high 16 bit of the NewAddr - (*(CurrentInstr++)) = LuiT0Instr | ((NewAddr & 0xffff0000) >> 16); - // addiu t0, t0, low 16 bit of the NewAddr - (*(CurrentInstr++)) = AddiuT0Instr | (NewAddr & 0x0000ffff); - // jr t0 - (*(CurrentInstr++)) = JrT0Instr; - (*CurrentInstr) = NopInstr; - - sys::Memory::InvalidateInstructionCache(Old, 4 * 4); - } else { - // Unsupported case - report_fatal_error("MipsJITInfo::replaceMachineCodeForFunction"); - } - } -} - -/// JITCompilerFunction - This contains the address of the JIT function used to -/// compile a function lazily. -static TargetJITInfo::JITCompilerFn JITCompilerFunction; - -// Get the ASMPREFIX for the current host. This is often '_'. -#ifndef __USER_LABEL_PREFIX__ -#define __USER_LABEL_PREFIX__ -#endif -#define GETASMPREFIX2(X) #X -#define GETASMPREFIX(X) GETASMPREFIX2(X) -#define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__) - -// CompilationCallback stub - We can't use a C function with inline assembly in -// it, because the prolog/epilog inserted by GCC won't work for us. Instead, -// write our own wrapper, which does things our way, so we have complete control -// over register saving and restoring. This code saves registers, calls -// MipsCompilationCallbackC and restores registers. -extern "C" { -#if defined (__mips__) -void MipsCompilationCallback(); - - asm( - ".text\n" - ".align 2\n" - ".globl " ASMPREFIX "MipsCompilationCallback\n" - ASMPREFIX "MipsCompilationCallback:\n" - ".ent " ASMPREFIX "MipsCompilationCallback\n" - ".frame $sp, 32, $ra\n" - ".set noreorder\n" - ".cpload $t9\n" - - "addiu $sp, $sp, -64\n" - ".cprestore 16\n" - - // Save argument registers a0, a1, a2, a3, f12, f14 since they may contain - // stuff for the real target function right now. We have to act as if this - // whole compilation callback doesn't exist as far as the caller is - // concerned. We also need to save the ra register since it contains the - // original return address, and t8 register since it contains the address - // of the end of function stub. - "sw $a0, 20($sp)\n" - "sw $a1, 24($sp)\n" - "sw $a2, 28($sp)\n" - "sw $a3, 32($sp)\n" - "sw $ra, 36($sp)\n" - "sw $t8, 40($sp)\n" - "sdc1 $f12, 48($sp)\n" - "sdc1 $f14, 56($sp)\n" - - // t8 points at the end of function stub. Pass the beginning of the stub - // to the MipsCompilationCallbackC. - "addiu $a0, $t8, -16\n" - "jal " ASMPREFIX "MipsCompilationCallbackC\n" - "nop\n" - - // Restore registers. - "lw $a0, 20($sp)\n" - "lw $a1, 24($sp)\n" - "lw $a2, 28($sp)\n" - "lw $a3, 32($sp)\n" - "lw $ra, 36($sp)\n" - "lw $t8, 40($sp)\n" - "ldc1 $f12, 48($sp)\n" - "ldc1 $f14, 56($sp)\n" - "addiu $sp, $sp, 64\n" - - // Jump to the (newly modified) stub to invoke the real function. - "addiu $t8, $t8, -16\n" - "jr $t8\n" - "nop\n" - - ".set reorder\n" - ".end " ASMPREFIX "MipsCompilationCallback\n" - ); -#else // host != Mips - void MipsCompilationCallback() { - llvm_unreachable( - "Cannot call MipsCompilationCallback() on a non-Mips arch!"); - } -#endif -} - -/// MipsCompilationCallbackC - This is the target-specific function invoked -/// by the function stub when we did not know the real target of a call. -/// This function must locate the start of the stub or call site and pass -/// it into the JIT compiler function. -extern "C" void MipsCompilationCallbackC(intptr_t StubAddr) { - // Get the address of the compiled code for this function. - intptr_t NewVal = (intptr_t) JITCompilerFunction((void*) StubAddr); - - // Rewrite the function stub so that we don't end up here every time we - // execute the call. We're replacing the first four instructions of the - // stub with code that jumps to the compiled function: - // lui $t9, %hi(NewVal) - // addiu $t9, $t9, %lo(NewVal) - // jr $t9 - // nop - - int Hi = ((unsigned)NewVal & 0xffff0000) >> 16; - if ((NewVal & 0x8000) != 0) - Hi++; - int Lo = (int)(NewVal & 0xffff); - - *(intptr_t *)(StubAddr) = 0xf << 26 | 25 << 16 | Hi; - *(intptr_t *)(StubAddr + 4) = 9 << 26 | 25 << 21 | 25 << 16 | Lo; - *(intptr_t *)(StubAddr + 8) = 25 << 21 | 8; - *(intptr_t *)(StubAddr + 12) = 0; - - sys::Memory::InvalidateInstructionCache((void*) StubAddr, 16); -} - -TargetJITInfo::LazyResolverFn MipsJITInfo::getLazyResolverFunction( - JITCompilerFn F) { - JITCompilerFunction = F; - return MipsCompilationCallback; -} - -TargetJITInfo::StubLayout MipsJITInfo::getStubLayout() { - // The stub contains 4 4-byte instructions, aligned at 4 bytes. See - // emitFunctionStub for details. - StubLayout Result = { 4*4, 4 }; - return Result; -} - -void *MipsJITInfo::emitFunctionStub(const Function *F, void *Fn, - JITCodeEmitter &JCE) { - JCE.emitAlignment(4); - void *Addr = (void*) (JCE.getCurrentPCValue()); - if (!sys::Memory::setRangeWritable(Addr, 16)) - llvm_unreachable("ERROR: Unable to mark stub writable."); - - intptr_t EmittedAddr; - if (Fn != (void*)(intptr_t)MipsCompilationCallback) - EmittedAddr = (intptr_t)Fn; - else - EmittedAddr = (intptr_t)MipsCompilationCallback; - - - int Hi = ((unsigned)EmittedAddr & 0xffff0000) >> 16; - if ((EmittedAddr & 0x8000) != 0) - Hi++; - int Lo = (int)(EmittedAddr & 0xffff); - - // lui $t9, %hi(EmittedAddr) - // addiu $t9, $t9, %lo(EmittedAddr) - // jalr $t8, $t9 - // nop - if (IsLittleEndian) { - JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi); - JCE.emitWordLE(9 << 26 | 25 << 21 | 25 << 16 | Lo); - JCE.emitWordLE(25 << 21 | 24 << 11 | 9); - JCE.emitWordLE(0); - } else { - JCE.emitWordBE(0xf << 26 | 25 << 16 | Hi); - JCE.emitWordBE(9 << 26 | 25 << 21 | 25 << 16 | Lo); - JCE.emitWordBE(25 << 21 | 24 << 11 | 9); - JCE.emitWordBE(0); - } - - sys::Memory::InvalidateInstructionCache(Addr, 16); - if (!sys::Memory::setRangeExecutable(Addr, 16)) - llvm_unreachable("ERROR: Unable to mark stub executable."); - - return Addr; -} - -/// relocate - Before the JIT can run a block of code that has been emitted, -/// it must rewrite the code to contain the actual addresses of any -/// referenced global symbols. -void MipsJITInfo::relocate(void *Function, MachineRelocation *MR, - unsigned NumRelocs, unsigned char *GOTBase) { - for (unsigned i = 0; i != NumRelocs; ++i, ++MR) { - - void *RelocPos = (char*) Function + MR->getMachineCodeOffset(); - intptr_t ResultPtr = (intptr_t) MR->getResultPointer(); - - switch ((Mips::RelocationType) MR->getRelocationType()) { - case Mips::reloc_mips_pc16: - ResultPtr = (((ResultPtr - (intptr_t) RelocPos) - 4) >> 2) & 0xffff; - *((unsigned*) RelocPos) |= (unsigned) ResultPtr; - break; - - case Mips::reloc_mips_26: - ResultPtr = (ResultPtr & 0x0fffffff) >> 2; - *((unsigned*) RelocPos) |= (unsigned) ResultPtr; - break; - - case Mips::reloc_mips_hi: - ResultPtr = ResultPtr >> 16; - if ((((intptr_t) (MR->getResultPointer()) & 0xffff) >> 15) == 1) { - ResultPtr += 1; - } - *((unsigned*) RelocPos) |= (unsigned) ResultPtr; - break; - - case Mips::reloc_mips_lo: { - // Addend is needed for unaligned load/store instructions, where offset - // for the second load/store in the expanded instruction sequence must - // be modified by +1 or +3. Otherwise, Addend is 0. - int Addend = *((unsigned*) RelocPos) & 0xffff; - ResultPtr = (ResultPtr + Addend) & 0xffff; - *((unsigned*) RelocPos) &= 0xffff0000; - *((unsigned*) RelocPos) |= (unsigned) ResultPtr; - break; - } - } - } -} diff --git a/llvm/lib/Target/Mips/MipsJITInfo.h b/llvm/lib/Target/Mips/MipsJITInfo.h deleted file mode 100644 index c9dfd831d2d..00000000000 --- a/llvm/lib/Target/Mips/MipsJITInfo.h +++ /dev/null @@ -1,71 +0,0 @@ -//===- MipsJITInfo.h - Mips Implementation of the JIT Interface -*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains the declaration of the MipsJITInfo class. -// -//===----------------------------------------------------------------------===// - -#ifndef MIPSJITINFO_H -#define MIPSJITINFO_H - -#include "MipsMachineFunction.h" -#include "llvm/CodeGen/MachineConstantPool.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineJumpTableInfo.h" -#include "llvm/Target/TargetJITInfo.h" - -namespace llvm { -class MipsTargetMachine; - -class MipsJITInfo : public TargetJITInfo { - - bool IsPIC; - bool IsLittleEndian; - - public: - explicit MipsJITInfo() : - IsPIC(false), IsLittleEndian(true) {} - - /// replaceMachineCodeForFunction - Make it so that calling the function - /// whose machine code is at OLD turns into a call to NEW, perhaps by - /// overwriting OLD with a branch to NEW. This is used for self-modifying - /// code. - /// - void replaceMachineCodeForFunction(void *Old, void *New) override; - - // getStubLayout - Returns the size and alignment of the largest call stub - // on Mips. - StubLayout getStubLayout() override; - - /// emitFunctionStub - Use the specified JITCodeEmitter object to emit a - /// small native function that simply calls the function at the specified - /// address. - void *emitFunctionStub(const Function *F, void *Fn, - JITCodeEmitter &JCE) override; - - /// getLazyResolverFunction - Expose the lazy resolver to the JIT. - LazyResolverFn getLazyResolverFunction(JITCompilerFn) override; - - /// relocate - Before the JIT can run a block of code that has been emitted, - /// it must rewrite the code to contain the actual addresses of any - /// referenced global symbols. - void relocate(void *Function, MachineRelocation *MR, - unsigned NumRelocs, unsigned char *GOTBase) override; - - /// Initialize - Initialize internal stage for the function being JITted. - void Initialize(const MachineFunction &MF, bool isPIC, - bool isLittleEndian) { - IsPIC = isPIC; - IsLittleEndian = isLittleEndian; - } - -}; -} - -#endif diff --git a/llvm/lib/Target/Mips/MipsLongBranch.cpp b/llvm/lib/Target/Mips/MipsLongBranch.cpp index 19dac0c0419..71a6f4d4a11 100644 --- a/llvm/lib/Target/Mips/MipsLongBranch.cpp +++ b/llvm/lib/Target/Mips/MipsLongBranch.cpp @@ -16,6 +16,7 @@ #include "Mips.h" #include "MCTargetDesc/MipsBaseInfo.h" #include "MCTargetDesc/MipsMCNaCl.h" +#include "MipsMachineFunction.h" #include "MipsTargetMachine.h" #include "llvm/ADT/Statistic.h" #include "llvm/CodeGen/MachineFunctionPass.h" diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp index 0733a62cc8a..c1bbf61712b 100644 --- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp @@ -11,6 +11,7 @@ // //===----------------------------------------------------------------------===// #include "MipsSEISelLowering.h" +#include "MipsMachineFunction.h" #include "MipsRegisterInfo.h" #include "MipsTargetMachine.h" #include "llvm/CodeGen/MachineInstrBuilder.h" diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp index 5bf875daea9..1b0f5d7fa91 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.cpp +++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp @@ -115,7 +115,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, HasDSPR2(false), AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false), TM(_TM), TargetTriple(TT), DL(computeDataLayout(initializeSubtargetDependencies(CPU, FS, TM))), - TSInfo(DL), JITInfo(), InstrInfo(MipsInstrInfo::create(*this)), + TSInfo(DL), InstrInfo(MipsInstrInfo::create(*this)), FrameLowering(MipsFrameLowering::create(*this)), TLInfo(MipsTargetLowering::create(*TM, *this)) { diff --git a/llvm/lib/Target/Mips/MipsSubtarget.h b/llvm/lib/Target/Mips/MipsSubtarget.h index 3f7a6c3ed73..ab01414b6b8 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.h +++ b/llvm/lib/Target/Mips/MipsSubtarget.h @@ -17,7 +17,6 @@ #include "MipsFrameLowering.h" #include "MipsISelLowering.h" #include "MipsInstrInfo.h" -#include "MipsJITInfo.h" #include "MipsSelectionDAGInfo.h" #include "llvm/IR/DataLayout.h" #include "llvm/MC/MCInstrItineraries.h" @@ -145,7 +144,6 @@ protected: const DataLayout DL; // Calculates type size & alignment const MipsSelectionDAGInfo TSInfo; - MipsJITInfo JITInfo; std::unique_ptr<const MipsInstrInfo> InstrInfo; std::unique_ptr<const MipsFrameLowering> FrameLowering; std::unique_ptr<const MipsTargetLowering> TLInfo; @@ -272,7 +270,6 @@ public: void setHelperClassesMips16(); void setHelperClassesMipsSE(); - MipsJITInfo *getJITInfo() override { return &JITInfo; } const MipsSelectionDAGInfo *getSelectionDAGInfo() const override { return &TSInfo; } diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index ccf420962cd..79d1b4b13e9 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -189,10 +189,3 @@ bool MipsPassConfig::addPreEmitPass() { addPass(createMipsConstantIslandPass(TM)); return true; } - -bool MipsTargetMachine::addCodeEmitter(PassManagerBase &PM, - JITCodeEmitter &JCE) { - // Machine code emitter pass for Mips. - PM.add(createMipsJITCodeEmitterPass(*this, JCE)); - return false; -} diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h index eefd96ab4ae..e82efe2ecd2 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.h +++ b/llvm/lib/Target/Mips/MipsTargetMachine.h @@ -44,16 +44,12 @@ public: return Subtarget; return &DefaultSubtarget; } - MipsSubtarget *getSubtargetImpl() { - return static_cast<MipsSubtarget *>(TargetMachine::getSubtargetImpl()); - } /// \brief Reset the subtarget for the Mips target. void resetSubtarget(MachineFunction *MF); // Pass Pipeline Configuration TargetPassConfig *createPassConfig(PassManagerBase &PM) override; - bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override; }; /// MipsebTargetMachine - Mips32/64 big endian target machine. |
