diff options
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/Mips16InstrInfo.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsLongBranch.cpp | 3 |
4 files changed, 6 insertions, 11 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 5885fb1e23d..2eb757a9291 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -1412,9 +1412,7 @@ bool MipsAsmParser::needsExpansion(MCInst &Inst) { bool MipsAsmParser::expandInstruction(MCInst &Inst, SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions) { switch (Inst.getOpcode()) { - default: - assert(0 && "unimplemented expansion"); - return true; + default: llvm_unreachable("unimplemented expansion"); case Mips::LoadImm32Reg: return expandLoadImm(Inst, IDLoc, Instructions); case Mips::LoadImm64Reg: diff --git a/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp b/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp index 80e555e5f5c..61743ff7620 100644 --- a/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp +++ b/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp @@ -134,8 +134,8 @@ static void printExpr(const MCExpr *Expr, raw_ostream &OS) { } else if (const MipsMCExpr *ME = dyn_cast<MipsMCExpr>(Expr)) { ME->print(OS); return; - } else if (!(SRE = dyn_cast<MCSymbolRefExpr>(Expr))) - assert(false && "Unexpected MCExpr type."); + } else + SRE = cast<MCSymbolRefExpr>(Expr); MCSymbolRefExpr::VariantKind Kind = SRE->getKind(); diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp index 4dd9af24968..976beccfed9 100644 --- a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp +++ b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp @@ -144,7 +144,6 @@ bool Mips16InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const { /// opcode, e.g. turning BEQ to BNE. unsigned Mips16InstrInfo::getOppositeBranchOpc(unsigned Opc) const { switch (Opc) { - default: llvm_unreachable("Illegal opcode!"); case Mips::BeqzRxImmX16: return Mips::BnezRxImmX16; case Mips::BnezRxImmX16: return Mips::BeqzRxImmX16; case Mips::BeqzRxImm16: return Mips::BnezRxImm16; @@ -166,8 +165,7 @@ unsigned Mips16InstrInfo::getOppositeBranchOpc(unsigned Opc) const { case Mips::BtnezT8SltX16: return Mips::BteqzT8SltX16; case Mips::BtnezT8SltiX16: return Mips::BteqzT8SltiX16; } - assert(false && "Implement this function."); - return 0; + llvm_unreachable("Illegal opcode!"); } static void addSaveRestoreRegs(MachineInstrBuilder &MIB, @@ -288,7 +286,7 @@ void Mips16InstrInfo::adjustStackPtrBig(unsigned SP, int64_t Amount, void Mips16InstrInfo::adjustStackPtrBigUnrestricted( unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { - assert(false && "adjust stack pointer amount exceeded"); + llvm_unreachable("adjust stack pointer amount exceeded"); } /// Adjust SP by Amount bytes. diff --git a/llvm/lib/Target/Mips/MipsLongBranch.cpp b/llvm/lib/Target/Mips/MipsLongBranch.cpp index cf267c94f5e..9d873052cab 100644 --- a/llvm/lib/Target/Mips/MipsLongBranch.cpp +++ b/llvm/lib/Target/Mips/MipsLongBranch.cpp @@ -110,8 +110,7 @@ static MachineBasicBlock *getTargetMBB(const MachineInstr &Br) { return MO.getMBB(); } - assert(false && "This instruction does not have an MBB operand."); - return nullptr; + llvm_unreachable("This instruction does not have an MBB operand."); } // Traverse the list of instructions backwards until a non-debug instruction is |
