diff options
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsCondMov.td | 12 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSubtarget.cpp | 8 |
3 files changed, 17 insertions, 9 deletions
diff --git a/llvm/lib/Target/Mips/MipsCondMov.td b/llvm/lib/Target/Mips/MipsCondMov.td index aac541373be..af10cd4e576 100644 --- a/llvm/lib/Target/Mips/MipsCondMov.td +++ b/llvm/lib/Target/Mips/MipsCondMov.td @@ -284,13 +284,19 @@ let usesCustomInserter = 1 in { } def PseudoSELECT_I : Select_Pseudo<GPR32Opnd>; +def PseudoSELECT_I64 : Select_Pseudo<GPR64Opnd>; def PseudoSELECT_S : Select_Pseudo<FGR32Opnd>; -def PseudoSELECT_D32 : Select_Pseudo<AFGR64Opnd>; +def PseudoSELECT_D32 : Select_Pseudo<AFGR64Opnd>, FGR_32; +def PseudoSELECT_D64 : Select_Pseudo<FGR64Opnd>, FGR_64; def PseudoSELECTFP_T_I : SelectFP_Pseudo_T<GPR32Opnd>; +def PseudoSELECTFP_T_I64 : SelectFP_Pseudo_T<GPR64Opnd>; def PseudoSELECTFP_T_S : SelectFP_Pseudo_T<FGR32Opnd>; -def PseudoSELECTFP_T_D32 : SelectFP_Pseudo_T<AFGR64Opnd>; +def PseudoSELECTFP_T_D32 : SelectFP_Pseudo_T<AFGR64Opnd>, FGR_32; +def PseudoSELECTFP_T_D64 : SelectFP_Pseudo_T<FGR64Opnd>, FGR_64; def PseudoSELECTFP_F_I : SelectFP_Pseudo_F<GPR32Opnd>; +def PseudoSELECTFP_F_I64 : SelectFP_Pseudo_F<GPR64Opnd>; def PseudoSELECTFP_F_S : SelectFP_Pseudo_F<FGR32Opnd>; -def PseudoSELECTFP_F_D32 : SelectFP_Pseudo_F<AFGR64Opnd>; +def PseudoSELECTFP_F_D32 : SelectFP_Pseudo_F<AFGR64Opnd>, FGR_32; +def PseudoSELECTFP_F_D64 : SelectFP_Pseudo_F<FGR64Opnd>, FGR_64; diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 7fc504e2e73..9e51312875b 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -947,16 +947,22 @@ MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, return emitSEL_D(MI, BB); case Mips::PseudoSELECT_I: + case Mips::PseudoSELECT_I64: case Mips::PseudoSELECT_S: case Mips::PseudoSELECT_D32: + case Mips::PseudoSELECT_D64: return emitPseudoSELECT(MI, BB, false, Mips::BNE); case Mips::PseudoSELECTFP_F_I: + case Mips::PseudoSELECTFP_F_I64: case Mips::PseudoSELECTFP_F_S: case Mips::PseudoSELECTFP_F_D32: + case Mips::PseudoSELECTFP_F_D64: return emitPseudoSELECT(MI, BB, true, Mips::BC1F); case Mips::PseudoSELECTFP_T_I: + case Mips::PseudoSELECTFP_T_I64: case Mips::PseudoSELECTFP_T_S: case Mips::PseudoSELECTFP_T_D32: + case Mips::PseudoSELECTFP_T_D64: return emitPseudoSELECT(MI, BB, true, Mips::BC1T); } } diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp index 8768b12f7d1..ade13ccd9ed 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.cpp +++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp @@ -129,14 +129,10 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, if (MipsArchVersion == MipsDefault) MipsArchVersion = Mips32; - // Don't even attempt to generate code for MIPS-I, MIPS-III and MIPS-V. - // They have not been tested and currently exist for the integrated - // assembler only. + // Don't even attempt to generate code for MIPS-I and MIPS-V. They have not + // been tested and currently exist for the integrated assembler only. if (MipsArchVersion == Mips1) report_fatal_error("Code generation for MIPS-I is not implemented", false); - if (MipsArchVersion == Mips3) - report_fatal_error("Code generation for MIPS-III is not implemented", - false); if (MipsArchVersion == Mips5) report_fatal_error("Code generation for MIPS-V is not implemented", false); |
