diff options
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSubtarget.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSubtarget.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp index 20915379f96..3e7570ff46e 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.cpp +++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp @@ -114,7 +114,7 @@ MipsSubtarget::MipsSubtarget(const Triple &TT, const std::string &CPU, report_fatal_error(ISA + " is not compatible with the DSP ASE", false); } - if (NoABICalls && TM.getRelocationModel() == Reloc::PIC_) + if (NoABICalls && TM.isPositionIndependent()) report_fatal_error("position-independent code requires '-mabicalls'"); // Set UseSmallSection. @@ -126,6 +126,10 @@ MipsSubtarget::MipsSubtarget(const Triple &TT, const std::string &CPU, } } +bool MipsSubtarget::isPositionIndependent() const { + return TM.isPositionIndependent(); +} + /// This overrides the PostRAScheduler bit in the SchedModel for any CPU. bool MipsSubtarget::enablePostRAScheduler() const { return true; } |
