diff options
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSEInstrInfo.h')
-rw-r--r-- | llvm/lib/Target/Mips/MipsSEInstrInfo.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEInstrInfo.h b/llvm/lib/Target/Mips/MipsSEInstrInfo.h index 12010f92baf..b356909bf1c 100644 --- a/llvm/lib/Target/Mips/MipsSEInstrInfo.h +++ b/llvm/lib/Target/Mips/MipsSEInstrInfo.h @@ -32,7 +32,7 @@ public: /// the destination along with the FrameIndex of the loaded stack slot. If /// not, return 0. This predicate must return 0 if the instruction has /// any side effects other than loading from the stack slot. - unsigned isLoadFromStackSlot(const MachineInstr *MI, + unsigned isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override; /// isStoreToStackSlot - If the specified machine instruction is a direct @@ -40,7 +40,7 @@ public: /// the source reg along with the FrameIndex of the loaded stack slot. If /// not, return 0. This predicate must return 0 if the instruction has /// any side effects other than storing to the stack slot. - unsigned isStoreToStackSlot(const MachineInstr *MI, + unsigned isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override; void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, @@ -61,7 +61,7 @@ public: const TargetRegisterInfo *TRI, int64_t Offset) const override; - bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const override; + bool expandPostRAPseudo(MachineInstr &MI) const override; unsigned getOppositeBranchOpc(unsigned Opc) const override; |