diff options
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSEISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp index 2d8ccf124ba..cb6a5574f02 100644 --- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp @@ -677,7 +677,7 @@ static SDValue performORCombine(SDNode *N, SelectionDAG &DAG, } // Transform the DAG into an equivalent VSELECT. - return DAG.getNode(ISD::VSELECT, SDLoc(N), Ty, Cond, IfClr, IfSet); + return DAG.getNode(ISD::VSELECT, SDLoc(N), Ty, Cond, IfSet, IfClr); } return SDValue(); @@ -1459,25 +1459,27 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::mips_binsli_h: case Intrinsic::mips_binsli_w: case Intrinsic::mips_binsli_d: { + // binsli_x(IfClear, IfSet, nbits) -> (vselect LBitsMask, IfSet, IfClear) EVT VecTy = Op->getValueType(0); EVT EltTy = VecTy.getVectorElementType(); APInt Mask = APInt::getHighBitsSet(EltTy.getSizeInBits(), Op->getConstantOperandVal(3)); return DAG.getNode(ISD::VSELECT, DL, VecTy, - DAG.getConstant(Mask, VecTy, true), Op->getOperand(1), - Op->getOperand(2)); + DAG.getConstant(Mask, VecTy, true), Op->getOperand(2), + Op->getOperand(1)); } case Intrinsic::mips_binsri_b: case Intrinsic::mips_binsri_h: case Intrinsic::mips_binsri_w: case Intrinsic::mips_binsri_d: { + // binsri_x(IfClear, IfSet, nbits) -> (vselect RBitsMask, IfSet, IfClear) EVT VecTy = Op->getValueType(0); EVT EltTy = VecTy.getVectorElementType(); APInt Mask = APInt::getLowBitsSet(EltTy.getSizeInBits(), Op->getConstantOperandVal(3)); return DAG.getNode(ISD::VSELECT, DL, VecTy, - DAG.getConstant(Mask, VecTy, true), Op->getOperand(1), - Op->getOperand(2)); + DAG.getConstant(Mask, VecTy, true), Op->getOperand(2), + Op->getOperand(1)); } case Intrinsic::mips_bmnz_v: return DAG.getNode(ISD::VSELECT, DL, Op->getValueType(0), Op->getOperand(3), @@ -1520,13 +1522,15 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, return DAG.getNode(MipsISD::VANY_NONZERO, DL, Op->getValueType(0), Op->getOperand(1)); case Intrinsic::mips_bsel_v: + // bsel_v(Mask, IfClear, IfSet) -> (vselect Mask, IfSet, IfClear) return DAG.getNode(ISD::VSELECT, DL, Op->getValueType(0), - Op->getOperand(1), Op->getOperand(2), - Op->getOperand(3)); + Op->getOperand(1), Op->getOperand(3), + Op->getOperand(2)); case Intrinsic::mips_bseli_b: + // bseli_v(Mask, IfClear, IfSet) -> (vselect Mask, IfSet, IfClear) return DAG.getNode(ISD::VSELECT, DL, Op->getValueType(0), - Op->getOperand(1), Op->getOperand(2), - lowerMSASplatImm(Op, 3, DAG)); + Op->getOperand(1), lowerMSASplatImm(Op, 3, DAG), + Op->getOperand(2)); case Intrinsic::mips_bset_b: case Intrinsic::mips_bset_h: case Intrinsic::mips_bset_w: |
