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-rw-r--r--llvm/lib/Target/Mips/MipsMCInstLower.cpp146
1 files changed, 73 insertions, 73 deletions
diff --git a/llvm/lib/Target/Mips/MipsMCInstLower.cpp b/llvm/lib/Target/Mips/MipsMCInstLower.cpp
index 0bdf15346db..01b20b19f6b 100644
--- a/llvm/lib/Target/Mips/MipsMCInstLower.cpp
+++ b/llvm/lib/Target/Mips/MipsMCInstLower.cpp
@@ -213,102 +213,102 @@ void MipsMCInstLower::LowerUnalignedLoadStore(const MachineInstr *MI,
SmallVector<MCInst,
4>& MCInsts) {
unsigned Opc = MI->getOpcode();
- MCInst instr1, instr2, instr3, move;
+ MCInst Instr1, Instr2, Instr3, Move;
- bool two_instructions = false;
+ bool TwoInstructions = false;
assert(MI->getNumOperands() == 3);
assert(MI->getOperand(0).isReg());
assert(MI->getOperand(1).isReg());
- MCOperand target = LowerOperand(MI->getOperand(0));
- MCOperand base = LowerOperand(MI->getOperand(1));
- MCOperand atReg = MCOperand::CreateReg(Mips::AT);
- MCOperand zeroReg = MCOperand::CreateReg(Mips::ZERO);
+ MCOperand Target = LowerOperand(MI->getOperand(0));
+ MCOperand Base = LowerOperand(MI->getOperand(1));
+ MCOperand ATReg = MCOperand::CreateReg(Mips::AT);
+ MCOperand ZeroReg = MCOperand::CreateReg(Mips::ZERO);
- MachineOperand unloweredName = MI->getOperand(2);
- MCOperand name = LowerOperand(unloweredName);
+ MachineOperand UnLoweredName = MI->getOperand(2);
+ MCOperand Name = LowerOperand(UnLoweredName);
- move.setOpcode(Mips::ADDu);
- move.addOperand(target);
- move.addOperand(atReg);
- move.addOperand(zeroReg);
+ Move.setOpcode(Mips::ADDu);
+ Move.addOperand(Target);
+ Move.addOperand(ATReg);
+ Move.addOperand(ZeroReg);
switch (Opc) {
case Mips::ULW: {
// FIXME: only works for little endian right now
- MCOperand adj_name = LowerOperand(unloweredName, 3);
- if (base.getReg() == (target.getReg())) {
- instr1.setOpcode(Mips::LWL);
- instr1.addOperand(atReg);
- instr1.addOperand(base);
- instr1.addOperand(adj_name);
- instr2.setOpcode(Mips::LWR);
- instr2.addOperand(atReg);
- instr2.addOperand(base);
- instr2.addOperand(name);
- instr3 = move;
+ MCOperand AdjName = LowerOperand(UnLoweredName, 3);
+ if (Base.getReg() == (Target.getReg())) {
+ Instr1.setOpcode(Mips::LWL);
+ Instr1.addOperand(ATReg);
+ Instr1.addOperand(Base);
+ Instr1.addOperand(AdjName);
+ Instr2.setOpcode(Mips::LWR);
+ Instr2.addOperand(ATReg);
+ Instr2.addOperand(Base);
+ Instr2.addOperand(Name);
+ Instr3 = Move;
} else {
- two_instructions = true;
- instr1.setOpcode(Mips::LWL);
- instr1.addOperand(target);
- instr1.addOperand(base);
- instr1.addOperand(adj_name);
- instr2.setOpcode(Mips::LWR);
- instr2.addOperand(target);
- instr2.addOperand(base);
- instr2.addOperand(name);
+ TwoInstructions = true;
+ Instr1.setOpcode(Mips::LWL);
+ Instr1.addOperand(Target);
+ Instr1.addOperand(Base);
+ Instr1.addOperand(AdjName);
+ Instr2.setOpcode(Mips::LWR);
+ Instr2.addOperand(Target);
+ Instr2.addOperand(Base);
+ Instr2.addOperand(Name);
}
break;
}
case Mips::ULHu: {
// FIXME: only works for little endian right now
- MCOperand adj_name = LowerOperand(unloweredName, 1);
- instr1.setOpcode(Mips::LBu);
- instr1.addOperand(atReg);
- instr1.addOperand(base);
- instr1.addOperand(adj_name);
- instr2.setOpcode(Mips::LBu);
- instr2.addOperand(target);
- instr2.addOperand(base);
- instr2.addOperand(name);
- instr3.setOpcode(Mips::INS);
- instr3.addOperand(target);
- instr3.addOperand(atReg);
- instr3.addOperand(MCOperand::CreateImm(0x8));
- instr3.addOperand(MCOperand::CreateImm(0x18));
+ MCOperand AdjName = LowerOperand(UnLoweredName, 1);
+ Instr1.setOpcode(Mips::LBu);
+ Instr1.addOperand(ATReg);
+ Instr1.addOperand(Base);
+ Instr1.addOperand(AdjName);
+ Instr2.setOpcode(Mips::LBu);
+ Instr2.addOperand(Target);
+ Instr2.addOperand(Base);
+ Instr2.addOperand(Name);
+ Instr3.setOpcode(Mips::INS);
+ Instr3.addOperand(Target);
+ Instr3.addOperand(ATReg);
+ Instr3.addOperand(MCOperand::CreateImm(0x8));
+ Instr3.addOperand(MCOperand::CreateImm(0x18));
break;
}
case Mips::USW: {
// FIXME: only works for little endian right now
- assert (base.getReg() != target.getReg());
- two_instructions = true;
- MCOperand adj_name = LowerOperand(unloweredName, 3);
- instr1.setOpcode(Mips::SWL);
- instr1.addOperand(target);
- instr1.addOperand(base);
- instr1.addOperand(adj_name);
- instr2.setOpcode(Mips::SWR);
- instr2.addOperand(target);
- instr2.addOperand(base);
- instr2.addOperand(name);
+ assert (Base.getReg() != Target.getReg());
+ TwoInstructions = true;
+ MCOperand AdjName = LowerOperand(UnLoweredName, 3);
+ Instr1.setOpcode(Mips::SWL);
+ Instr1.addOperand(Target);
+ Instr1.addOperand(Base);
+ Instr1.addOperand(AdjName);
+ Instr2.setOpcode(Mips::SWR);
+ Instr2.addOperand(Target);
+ Instr2.addOperand(Base);
+ Instr2.addOperand(Name);
break;
}
case Mips::USH: {
- MCOperand adj_name = LowerOperand(unloweredName, 1);
- instr1.setOpcode(Mips::SB);
- instr1.addOperand(target);
- instr1.addOperand(base);
- instr1.addOperand(name);
- instr2.setOpcode(Mips::SRL);
- instr2.addOperand(atReg);
- instr2.addOperand(target);
- instr2.addOperand(MCOperand::CreateImm(8));
- instr3.setOpcode(Mips::SB);
- instr3.addOperand(atReg);
- instr3.addOperand(base);
- instr3.addOperand(adj_name);
+ MCOperand AdjName = LowerOperand(UnLoweredName, 1);
+ Instr1.setOpcode(Mips::SB);
+ Instr1.addOperand(Target);
+ Instr1.addOperand(Base);
+ Instr1.addOperand(Name);
+ Instr2.setOpcode(Mips::SRL);
+ Instr2.addOperand(ATReg);
+ Instr2.addOperand(Target);
+ Instr2.addOperand(MCOperand::CreateImm(8));
+ Instr3.setOpcode(Mips::SB);
+ Instr3.addOperand(ATReg);
+ Instr3.addOperand(Base);
+ Instr3.addOperand(AdjName);
break;
}
default:
@@ -316,8 +316,8 @@ void MipsMCInstLower::LowerUnalignedLoadStore(const MachineInstr *MI,
assert(0 && "unaligned instruction not processed");
}
- MCInsts.push_back(instr1);
- MCInsts.push_back(instr2);
- if (!two_instructions) MCInsts.push_back(instr3);
+ MCInsts.push_back(Instr1);
+ MCInsts.push_back(Instr2);
+ if (!TwoInstructions) MCInsts.push_back(Instr3);
}
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