diff options
Diffstat (limited to 'llvm/lib/Target/Mips/Mips64InstrInfo.td')
| -rw-r--r-- | llvm/lib/Target/Mips/Mips64InstrInfo.td | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td index d5d794d08bf..e0a31c846f3 100644 --- a/llvm/lib/Target/Mips/Mips64InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips64InstrInfo.td @@ -268,15 +268,14 @@ let isCodeGenOnly = 1 in def RDHWR64 : ReadHardware<GPR64Opnd, HWRegsOpnd>, RDHWR_FM; let AdditionalPredicates = [NotInMicroMips] in { - // TODO: Add 'pos + size' constraint check to dext* instructions - // DEXT: 0 < pos + size <= 63 - // DEXTM, DEXTU: 32 < pos + size <= 64 - def DEXT : ExtBase<"dext", GPR64Opnd, uimm5, uimm5_plus1, MipsExt>, - EXT_FM<3>; - def DEXTM : ExtBase<"dextm", GPR64Opnd, uimm5, uimm5_plus33, MipsExt>, - EXT_FM<1>; + // The 'pos + size' constraints are enforced by the code that lowers into + // MipsISD::Ext. + def DEXT : ExtBase<"dext", GPR64Opnd, uimm5_report_uimm6, uimm5_plus1, + immZExt5, immZExt5Plus1, MipsExt>, EXT_FM<3>; + def DEXTM : ExtBase<"dextm", GPR64Opnd, uimm5, uimm5_plus33, immZExt5, + immZExt5Plus33, MipsExt>, EXT_FM<1>; def DEXTU : ExtBase<"dextu", GPR64Opnd, uimm5_plus32, uimm5_plus1, - MipsExt>, EXT_FM<2>; + immZExt5Plus32, immZExt5Plus1, MipsExt>, EXT_FM<2>; def DINS : InsBase<"dins", GPR64Opnd, uimm6, uimm5_inssize_plus1, MipsIns>, EXT_FM<7>; def DINSU : InsBase<"dinsu", GPR64Opnd, uimm5_plus32, uimm5_inssize_plus1>, |
