diff options
Diffstat (limited to 'llvm/lib/Target/Mips/MicroMipsInstrInfo.td')
| -rw-r--r-- | llvm/lib/Target/Mips/MicroMipsInstrInfo.td | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td index 86b4b0f279e..71abfcd82ef 100644 --- a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td @@ -1,5 +1,7 @@ def addrimm12 : ComplexPattern<iPTR, 2, "selectIntAddrMM", [frameindex]>; +def simm4 : Operand<i32>; + def simm12 : Operand<i32> { let DecoderMethod = "DecodeSimm12"; } @@ -84,6 +86,13 @@ class LoadMM<string opstr, DAGOperand RO, SDPatternOperator OpNode = null_frag, let mayLoad = 1; } +class AddImmUS5<string opstr, RegisterOperand RO> : + MicroMipsInst16<(outs RO:$dst), (ins RO:$rd, simm4:$imm), + !strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmR> { + let Constraints = "$rd = $dst"; + let isCommutable = 1; +} + class MoveFromHILOMM<string opstr, RegisterOperand RO, Register UseReg> : MicroMipsInst16<(outs RO:$rd), (ins), !strconcat(opstr, "\t$rd"), [], II_MFHI_MFLO, FrmR> { @@ -156,6 +165,7 @@ let isCall = 1, hasDelaySlot = 1, Defs = [RA] in { !strconcat(opstr, "\t$rs, $offset"), [], IIBranch, FrmI, opstr>; } +def ADDIUS5_MM : AddImmUS5<"addius5", GPR32Opnd>, ADDIUS5_FM_MM16; def MFHI16_MM : MoveFromHILOMM<"mfhi", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x10>; def MFLO16_MM : MoveFromHILOMM<"mflo", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x12>; def MOVE16_MM : MoveMM16<"move", GPR32Opnd>, MOVE_FM_MM16<0x03>; |
