diff options
Diffstat (limited to 'llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h')
| -rw-r--r-- | llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h index 13f6e4045b0..4069d7d184e 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h @@ -26,7 +26,7 @@ class MCRegisterInfo; class MCSubtargetInfo; class StringRef; class Target; -class TargetTuple; +class Triple; class raw_ostream; class raw_pwrite_stream; @@ -44,22 +44,22 @@ MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, MCAsmBackend *createMipsAsmBackendEB32(const Target &T, const MCRegisterInfo &MRI, - const TargetTuple &TT, StringRef CPU); + const Triple &TT, StringRef CPU); MCAsmBackend *createMipsAsmBackendEL32(const Target &T, const MCRegisterInfo &MRI, - const TargetTuple &TT, StringRef CPU); + const Triple &TT, StringRef CPU); MCAsmBackend *createMipsAsmBackendEB64(const Target &T, const MCRegisterInfo &MRI, - const TargetTuple &TT, StringRef CPU); + const Triple &TT, StringRef CPU); MCAsmBackend *createMipsAsmBackendEL64(const Target &T, const MCRegisterInfo &MRI, - const TargetTuple &TT, StringRef CPU); + const Triple &TT, StringRef CPU); MCObjectWriter *createMipsELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool IsLittleEndian, bool Is64Bit); namespace MIPS_MC { -StringRef selectMipsCPU(const TargetTuple &TT, StringRef CPU); +StringRef selectMipsCPU(const Triple &TT, StringRef CPU); } } // End llvm namespace |
