diff options
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser')
-rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 29 |
1 files changed, 14 insertions, 15 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 5bc8f9d4b63..1433b4319c1 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -215,8 +215,8 @@ class MipsAsmParser : public MCTargetAsmParser { MCSymbolRefExpr::VariantKind getVariantKind(StringRef Symbol); - bool isMips64() const { - return (STI.getFeatureBits() & Mips::FeatureMips64) != 0; + bool isGP64() const { + return (STI.getFeatureBits() & Mips::FeatureGP64Bit) != 0; } bool isFP64() const { @@ -879,7 +879,7 @@ void MipsAsmParser::expandMemInst(MCInst &Inst, SMLoc IDLoc, const MCExpr *ExprOffset; unsigned TmpRegNum; unsigned AtRegNum = getReg( - (isMips64()) ? Mips::GPR64RegClassID : Mips::GPR32RegClassID, getATReg()); + (isGP64()) ? Mips::GPR64RegClassID : Mips::GPR32RegClassID, getATReg()); // 1st operand is either the source or destination register. assert(Inst.getOperand(0).isReg() && "expected register operand kind"); unsigned RegOpNum = Inst.getOperand(0).getReg(); @@ -1210,11 +1210,10 @@ unsigned MipsAsmParser::getReg(int RC, int RegNo) { } unsigned MipsAsmParser::getGPR(int RegNo) { - return getReg((isMips64()) ? Mips::GPR64RegClassID : Mips::GPR32RegClassID, - RegNo); + return getReg(isGP64() ? Mips::GPR64RegClassID : Mips::GPR32RegClassID, + RegNo); } - int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) { if (RegNum > getContext().getRegisterInfo()->getRegClass(RegClass).getNumRegs() - 1) @@ -1279,7 +1278,7 @@ MipsAsmParser::ParseOperand(SmallVectorImpl<MCParsedAsmOperand *> &Operands, SMLoc S = Parser.getTok().getLoc(); Parser.Lex(); // Eat dollar token. // Parse the register operand. - if (!tryParseRegisterOperand(Operands, isMips64())) { + if (!tryParseRegisterOperand(Operands, isGP64())) { if (getLexer().is(AsmToken::LParen)) { // Check if it is indexed addressing operand. Operands.push_back(MipsOperand::CreateToken("(", S)); @@ -1288,7 +1287,7 @@ MipsAsmParser::ParseOperand(SmallVectorImpl<MCParsedAsmOperand *> &Operands, return true; Parser.Lex(); // Eat the dollar - if (tryParseRegisterOperand(Operands, isMips64())) + if (tryParseRegisterOperand(Operands, isGP64())) return true; if (!getLexer().is(AsmToken::RParen)) @@ -1495,7 +1494,7 @@ bool MipsAsmParser::parseRelocOperand(const MCExpr *&Res) { bool MipsAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) { StartLoc = Parser.getTok().getLoc(); - RegNo = tryParseRegister(isMips64()); + RegNo = tryParseRegister(isGP64()); EndLoc = Parser.getTok().getLoc(); return (RegNo == (unsigned)-1); } @@ -1562,7 +1561,7 @@ MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseMemOperand( // Zero register assumed, add a memory operand with ZERO as its base. Operands.push_back(MipsOperand::CreateMem( - isMips64() ? Mips::ZERO_64 : Mips::ZERO, IdVal, S, E)); + isGP64() ? Mips::ZERO_64 : Mips::ZERO, IdVal, S, E)); return MatchOperand_Success; } Error(Parser.getTok().getLoc(), "'(' expected"); @@ -1572,8 +1571,8 @@ MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseMemOperand( Parser.Lex(); // Eat the '(' token. } - Res = parseRegs(Operands, isMips64() ? (int)MipsOperand::Kind_GPR64 - : (int)MipsOperand::Kind_GPR32); + Res = parseRegs(Operands, isGP64() ? (int)MipsOperand::Kind_GPR64 + : (int)MipsOperand::Kind_GPR32); if (Res != MatchOperand_Success) return Res; @@ -1965,7 +1964,7 @@ MipsAsmParser::parseMSACtrlRegs(SmallVectorImpl<MCParsedAsmOperand *> &Operands, MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseGPR64(SmallVectorImpl<MCParsedAsmOperand *> &Operands) { - if (!isMips64()) + if (!isGP64()) return MatchOperand_NoMatch; return parseRegs(Operands, (int)MipsOperand::Kind_GPR64); } @@ -2147,8 +2146,8 @@ bool MipsAsmParser::searchSymbolAlias( APInt IntVal(32, -1); if (!DefSymbol.substr(1).getAsInteger(10, IntVal)) RegNum = matchRegisterByNumber(IntVal.getZExtValue(), - isMips64() ? Mips::GPR64RegClassID - : Mips::GPR32RegClassID); + isGP64() ? Mips::GPR64RegClassID + : Mips::GPR32RegClassID); else { // Lookup for the register with the corresponding name. switch (Kind) { |