diff options
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index c9bc29ace9d..e92d58a879d 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -110,6 +110,9 @@ class MipsAsmParser : public MCTargetAsmParser { parseFGR32Regs(SmallVectorImpl<MCParsedAsmOperand*> &Operands); MipsAsmParser::OperandMatchResultTy + parseFGRH32Regs(SmallVectorImpl<MCParsedAsmOperand*> &Operands); + + MipsAsmParser::OperandMatchResultTy parseFCCRegs(SmallVectorImpl<MCParsedAsmOperand*> &Operands); MipsAsmParser::OperandMatchResultTy @@ -224,6 +227,7 @@ public: Kind_GPR64, Kind_HWRegs, Kind_FGR32Regs, + Kind_FGRH32Regs, Kind_FGR64Regs, Kind_AFGR64Regs, Kind_CCRRegs, @@ -408,6 +412,10 @@ public: return (Kind == k_Register) && Reg.Kind == Kind_FGR32Regs; } + bool isFGRH32Asm() const { + return (Kind == k_Register) && Reg.Kind == Kind_FGRH32Regs; + } + bool isFCCRegsAsm() const { return (Kind == k_Register) && Reg.Kind == Kind_FCCRegs; } @@ -893,6 +901,7 @@ int MipsAsmParser::regKindToRegClass(int RegKind) { case MipsOperand::Kind_GPR64: return Mips::GPR64RegClassID; case MipsOperand::Kind_HWRegs: return Mips::HWRegsRegClassID; case MipsOperand::Kind_FGR32Regs: return Mips::FGR32RegClassID; + case MipsOperand::Kind_FGRH32Regs: return Mips::FGRH32RegClassID; case MipsOperand::Kind_FGR64Regs: return Mips::FGR64RegClassID; case MipsOperand::Kind_AFGR64Regs: return Mips::AFGR64RegClassID; case MipsOperand::Kind_CCRRegs: return Mips::CCRRegClassID; @@ -1310,6 +1319,7 @@ MipsAsmParser::parseRegs(SmallVectorImpl<MCParsedAsmOperand*> &Operands, case MipsOperand::Kind_AFGR64Regs: case MipsOperand::Kind_FGR64Regs: case MipsOperand::Kind_FGR32Regs: + case MipsOperand::Kind_FGRH32Regs: RegNum = matchFPURegisterName(RegName); if (RegKind == MipsOperand::Kind_AFGR64Regs) RegNum /= 2; @@ -1416,6 +1426,11 @@ MipsAsmParser::parseFGR32Regs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { } MipsAsmParser::OperandMatchResultTy +MipsAsmParser::parseFGRH32Regs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { + return parseRegs(Operands, (int) MipsOperand::Kind_FGRH32Regs); +} + +MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseFCCRegs(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { return parseRegs(Operands, (int) MipsOperand::Kind_FCCRegs); } |
