summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonISelLowering.cpp')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonISelLowering.cpp11
1 files changed, 7 insertions, 4 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index aae07119e95..785084c7090 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -1957,7 +1957,7 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM,
ISD::FRINT, ISD::FNEARBYINT, ISD::FROUND, ISD::FFLOOR,
ISD::FMINNUM, ISD::FMAXNUM, ISD::FSINCOS,
// Misc:
- ISD::SELECT, ISD::ConstantPool,
+ ISD::BR_CC, ISD::SELECT_CC, ISD::ConstantPool,
// Vector:
ISD::BUILD_VECTOR, ISD::SCALAR_TO_VECTOR,
ISD::EXTRACT_VECTOR_ELT, ISD::INSERT_VECTOR_ELT,
@@ -1979,12 +1979,15 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM,
setTruncStoreAction(VT, TargetVT, Expand);
}
+ // Normalize all inputs to SELECT to be vectors of i32.
+ if (VT.getVectorElementType() != MVT::i32) {
+ MVT VT32 = MVT::getVectorVT(MVT::i32, VT.getSizeInBits()/32);
+ setOperationAction(ISD::SELECT, VT, Promote);
+ AddPromotedToType(ISD::SELECT, VT, VT32);
+ }
setOperationAction(ISD::SRA, VT, Custom);
setOperationAction(ISD::SHL, VT, Custom);
setOperationAction(ISD::SRL, VT, Custom);
-
- setOperationAction(ISD::BR_CC, VT, Expand);
- setOperationAction(ISD::SELECT_CC, VT, Expand);
}
// Types natively supported:
OpenPOWER on IntegriCloud