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-rw-r--r--llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp12
1 files changed, 7 insertions, 5 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp b/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
index 721cf041728..1640b40c164 100644
--- a/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
@@ -232,14 +232,16 @@ HexagonBlockRanges::RegisterSet HexagonBlockRanges::getLiveIns(
const TargetRegisterInfo &TRI) {
RegisterSet LiveIns;
RegisterSet Tmp;
+
for (auto I : B.liveins()) {
- if (I.LaneMask.all()) {
- Tmp.insert({I.PhysReg,0});
+ MCSubRegIndexIterator S(I.PhysReg, &TRI);
+ if (I.LaneMask.all() || (I.LaneMask.any() && !S.isValid())) {
+ Tmp.insert({I.PhysReg, 0});
continue;
}
- for (MCSubRegIndexIterator S(I.PhysReg, &TRI); S.isValid(); ++S) {
- LaneBitmask M = TRI.getSubRegIndexLaneMask(S.getSubRegIndex());
- if ((M & I.LaneMask).any())
+ for (; S.isValid(); ++S) {
+ unsigned SI = S.getSubRegIndex();
+ if ((I.LaneMask & TRI.getSubRegIndexLaneMask(SI)).any())
Tmp.insert({S.getSubReg(), 0});
}
}
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