diff options
Diffstat (limited to 'llvm/lib/Target/CellSPU')
| -rw-r--r-- | llvm/lib/Target/CellSPU/SPUInstrInfo.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/CellSPU/SPUInstrInfo.h | 11 |
2 files changed, 9 insertions, 7 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp index fa6e33b075e..5802eb68fee 100644 --- a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -64,7 +64,10 @@ SPUInstrInfo::getPointerRegClass() const bool SPUInstrInfo::isMoveInstr(const MachineInstr& MI, unsigned& sourceReg, - unsigned& destReg) const { + unsigned& destReg, + unsigned& SrcSR, unsigned& DstSR) const { + SrcSR = DstSR = 0; // No sub-registers. + // Primarily, ORI and OR are generated by copyRegToReg. But, there are other // cases where we can safely say that what's being done is really a move // (see how PowerPC does this -- it's the model for this code too.) diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.h b/llvm/lib/Target/CellSPU/SPUInstrInfo.h index bc57e155e53..7bbdfada12c 100644 --- a/llvm/lib/Target/CellSPU/SPUInstrInfo.h +++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.h @@ -49,12 +49,11 @@ namespace llvm { /// This is used for addressing modes. virtual const TargetRegisterClass *getPointerRegClass() const; - // Return true if the instruction is a register to register move and - // leave the source and dest operands in the passed parameters. - // - virtual bool isMoveInstr(const MachineInstr& MI, - unsigned& sourceReg, - unsigned& destReg) const; + /// Return true if the instruction is a register to register move and return + /// the source and dest operands and their sub-register indices by reference. + virtual bool isMoveInstr(const MachineInstr &MI, + unsigned &SrcReg, unsigned &DstReg, + unsigned &SrcSubIdx, unsigned &DstSubIdx) const; unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const; |
