diff options
Diffstat (limited to 'llvm/lib/Target/Alpha')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaInstrInfo.h | 8 |
2 files changed, 7 insertions, 6 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp index fa8224f113f..2c7404d5647 100644 --- a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -25,8 +25,8 @@ AlphaInstrInfo::AlphaInstrInfo() bool AlphaInstrInfo::isMoveInstr(const MachineInstr& MI, - unsigned& sourceReg, - unsigned& destReg) const { + unsigned& sourceReg, unsigned& destReg, + unsigned& SrcSR, unsigned& DstSR) const { unsigned oc = MI.getOpcode(); if (oc == Alpha::BISr || oc == Alpha::CPYSS || @@ -43,6 +43,7 @@ bool AlphaInstrInfo::isMoveInstr(const MachineInstr& MI, if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { sourceReg = MI.getOperand(1).getReg(); destReg = MI.getOperand(0).getReg(); + SrcSR = DstSR = 0; return true; } } diff --git a/llvm/lib/Target/Alpha/AlphaInstrInfo.h b/llvm/lib/Target/Alpha/AlphaInstrInfo.h index f04c4881f25..85f5a544009 100644 --- a/llvm/lib/Target/Alpha/AlphaInstrInfo.h +++ b/llvm/lib/Target/Alpha/AlphaInstrInfo.h @@ -30,11 +30,11 @@ public: /// virtual const AlphaRegisterInfo &getRegisterInfo() const { return RI; } - /// Return true if the instruction is a register to register move and - /// leave the source and dest operands in the passed parameters. - /// + /// Return true if the instruction is a register to register move and return + /// the source and dest operands and their sub-register indices by reference. virtual bool isMoveInstr(const MachineInstr &MI, - unsigned &SrcReg, unsigned &DstReg) const; + unsigned &SrcReg, unsigned &DstReg, + unsigned &SrcSubIdx, unsigned &DstSubIdx) const; virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const; |
