diff options
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 5 |
2 files changed, 0 insertions, 10 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 8e692f3fd40..bbeec1cac43 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -161,11 +161,6 @@ public: }; } // end anonymous namespace -namespace llvm { - // FIXME: TableGen this? - extern MCRegisterClass ARMMCRegisterClasses[]; // In ARMGenRegisterInfo.inc. -} - namespace { /// ARMOperand - Instances of this class represent a parsed ARM machine diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp index 4c5e9945139..defeb91ac0a 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp @@ -1152,11 +1152,6 @@ getMsbOpValue(const MCInst &MI, unsigned Op, return msb; } -namespace llvm { - // FIXME: TableGen this? - extern MCRegisterClass ARMMCRegisterClasses[]; // In ARMGenRegisterInfo.inc. -} - unsigned ARMMCCodeEmitter:: getRegisterListOpValue(const MCInst &MI, unsigned Op, SmallVectorImpl<MCFixup> &Fixups) const { |
