summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.cpp24
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.h9
2 files changed, 3 insertions, 30 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 54df2a59e19..6bdc5f3aedc 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -143,7 +143,6 @@ bool ARMBaseTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool DumpAsm,
MachineCodeEmitter &MCE) {
// FIXME: Move this to TargetJITInfo!
if (DefRelocModel == Reloc::Default)
@@ -151,15 +150,11 @@ bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
// Machine code emitter pass for ARM.
PM.add(createARMCodeEmitterPass(*this, MCE));
- if (DumpAsm)
- addAssemblyEmitter(PM, OptLevel, true, ferrs());
-
return false;
}
bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool DumpAsm,
JITCodeEmitter &JCE) {
// FIXME: Move this to TargetJITInfo!
if (DefRelocModel == Reloc::Default)
@@ -167,15 +162,11 @@ bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
// Machine code emitter pass for ARM.
PM.add(createARMJITCodeEmitterPass(*this, JCE));
- if (DumpAsm)
- addAssemblyEmitter(PM, OptLevel, true, ferrs());
-
return false;
}
bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool DumpAsm,
ObjectCodeEmitter &OCE) {
// FIXME: Move this to TargetJITInfo!
if (DefRelocModel == Reloc::Default)
@@ -183,45 +174,30 @@ bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
// Machine code emitter pass for ARM.
PM.add(createARMObjectCodeEmitterPass(*this, OCE));
- if (DumpAsm)
- addAssemblyEmitter(PM, OptLevel, true, ferrs());
-
return false;
}
bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool DumpAsm,
MachineCodeEmitter &MCE) {
// Machine code emitter pass for ARM.
PM.add(createARMCodeEmitterPass(*this, MCE));
- if (DumpAsm)
- addAssemblyEmitter(PM, OptLevel, true, ferrs());
-
return false;
}
bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool DumpAsm,
JITCodeEmitter &JCE) {
// Machine code emitter pass for ARM.
PM.add(createARMJITCodeEmitterPass(*this, JCE));
- if (DumpAsm)
- addAssemblyEmitter(PM, OptLevel, true, ferrs());
-
return false;
}
bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool DumpAsm,
ObjectCodeEmitter &OCE) {
// Machine code emitter pass for ARM.
PM.add(createARMObjectCodeEmitterPass(*this, OCE));
- if (DumpAsm)
- addAssemblyEmitter(PM, OptLevel, true, ferrs());
-
return false;
}
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h
index 0130a62ef8d..b1287b62859 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.h
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.h
@@ -59,22 +59,19 @@ public:
CodeGenOpt::Level OptLevel,
bool Verbose, formatted_raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
- bool DumpAsm, MachineCodeEmitter &MCE);
+ MachineCodeEmitter &MCE);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
- bool DumpAsm, JITCodeEmitter &MCE);
+ JITCodeEmitter &MCE);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
- bool DumpAsm, ObjectCodeEmitter &OCE);
+ ObjectCodeEmitter &OCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool DumpAsm,
MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool DumpAsm,
JITCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
- bool DumpAsm,
ObjectCodeEmitter &OCE);
};
OpenPOWER on IntegriCloud