diff options
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 6 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 5 |
4 files changed, 0 insertions, 15 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 705f97097c1..c95d4c8f3f4 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1027,12 +1027,6 @@ bool ARMBaseInstrInfo::isIdentical(const MachineInstr *MI0, return TargetInstrInfoImpl::isIdentical(MI0, MI1, MRI); } -bool ARMBaseInstrInfo::isProfitableToDuplicateIndirectBranch() const { - // If the target processor can predict indirect branches, it is highly - // desirable to duplicate them, since it can often make them predictable. - return getSubtarget().hasBranchTargetBuffer(); -} - /// getInstrPredicate - If instruction is predicated, returns its predicate /// condition, otherwise returns AL. It also returns the condition code /// register by reference. diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h index 7944f354b9b..282e30c6f9f 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h @@ -290,8 +290,6 @@ public: virtual bool isIdentical(const MachineInstr *MI, const MachineInstr *Other, const MachineRegisterInfo *MRI) const; - - virtual bool isProfitableToDuplicateIndirectBranch() const; }; static inline diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp index d6b072b6c27..71f388354d4 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.cpp +++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp @@ -114,8 +114,6 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS, if (UseNEONFP.getPosition() == 0) UseNEONForSinglePrecisionFP = true; } - HasBranchTargetBuffer = (CPUString == "cortex-a8" || - CPUString == "cortex-a9"); } /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol. diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index b2467b073b5..3f06b7b7f15 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -50,9 +50,6 @@ protected: /// determine if NEON should actually be used. bool UseNEONForSinglePrecisionFP; - /// HasBranchTargetBuffer - True if processor can predict indirect branches. - bool HasBranchTargetBuffer; - /// IsThumb - True if we are in thumb mode, false if in ARM mode. bool IsThumb; @@ -130,8 +127,6 @@ protected: bool isThumb2() const { return IsThumb && (ThumbMode == Thumb2); } bool hasThumb2() const { return ThumbMode >= Thumb2; } - bool hasBranchTargetBuffer() const { return HasBranchTargetBuffer; } - bool isR9Reserved() const { return IsR9Reserved; } bool useMovt() const { return UseMovt && hasV6T2Ops(); } |