diff options
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARM.td | 15 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 13 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBuildAttrs.h | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 5 |
5 files changed, 39 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index 3bf81828bf7..36e5680ca4e 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -119,6 +119,12 @@ def FeatureDSPThumb2 : SubtargetFeature<"t2dsp", "Thumb2DSP", "true", def FeatureMP : SubtargetFeature<"mp", "HasMPExtension", "true", "Supports Multiprocessing extension">; +// Virtualization extension - requires HW divide (ARMv7-AR ARMARM - 4.4.8). +def FeatureVirtualization : SubtargetFeature<"virtualization", + "HasVirtualization", "true", + "Supports Virtualization extension", + [FeatureHWDiv, FeatureHWDivARM]>; + // M-series ISA def FeatureMClass : SubtargetFeature<"mclass", "ARMProcClass", "MClass", "Is microcontroller profile ('M' series)">; @@ -159,7 +165,8 @@ def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true", [HasV6T2Ops, FeaturePerfMon]>; def HasV8Ops : SubtargetFeature<"v8", "HasV8Ops", "true", "Support ARM v8 instructions", - [HasV7Ops]>; + [HasV7Ops, FeatureVirtualization, + FeatureMP]>; //===----------------------------------------------------------------------===// // ARM Processors supported. @@ -198,17 +205,17 @@ def ProcA15 : SubtargetFeature<"a15", "ARMProcFamily", "CortexA15", [FeatureT2XtPk, FeatureVFP4, FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureAvoidPartialCPSR, - FeatureTrustZone]>; + FeatureTrustZone, FeatureVirtualization]>; def ProcA53 : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53", "Cortex-A53 ARM processors", - [FeatureMP, FeatureHWDiv, FeatureHWDivARM, + [FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone, FeatureT2XtPk, FeatureCrypto, FeatureCRC]>; def ProcA57 : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57", "Cortex-A57 ARM processors", - [FeatureMP, FeatureHWDiv, FeatureHWDivARM, + [FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone, FeatureT2XtPk, FeatureCrypto, FeatureCRC]>; diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp index c0f6d1fad34..aa54e0ddf3b 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp @@ -703,6 +703,9 @@ void ARMAsmPrinter::emitAttributes() { // FIXME: Should we signal R9 usage? + if (Subtarget->hasMPExtension()) + ATS.emitAttribute(ARMBuildAttrs::MPextension_use, ARMBuildAttrs::AllowMP); + if (Subtarget->hasDivide()) { // Check if hardware divide is only available in thumb2 or ARM as well. ATS.emitAttribute(ARMBuildAttrs::DIV_use, @@ -710,6 +713,16 @@ void ARMAsmPrinter::emitAttributes() { ARMBuildAttrs::AllowDIVIfExists); } + if (Subtarget->hasTrustZone() && Subtarget->hasVirtualization()) + ATS.emitAttribute(ARMBuildAttrs::Virtualization_use, + ARMBuildAttrs::AllowTZVirtualization); + else if (Subtarget->hasTrustZone()) + ATS.emitAttribute(ARMBuildAttrs::Virtualization_use, + ARMBuildAttrs::AllowTZ); + else if (Subtarget->hasVirtualization()) + ATS.emitAttribute(ARMBuildAttrs::Virtualization_use, + ARMBuildAttrs::AllowVirtualization); + ATS.finishAttributeSection(); } diff --git a/llvm/lib/Target/ARM/ARMBuildAttrs.h b/llvm/lib/Target/ARM/ARMBuildAttrs.h index f63689bb31e..62d7d489f06 100644 --- a/llvm/lib/Target/ARM/ARMBuildAttrs.h +++ b/llvm/lib/Target/ARM/ARMBuildAttrs.h @@ -144,11 +144,19 @@ namespace ARMBuildAttrs { BaseAAPCS = 0, HardFPAAPCS = 1, + // Tag_MPextension_use, (=42), uleb128 + AllowMP = 1, // Allow use of MP extensions + // Tag_DIV_use, (=44), uleb128 AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no info exists. DisallowDIV = 1, // Hardware divide explicitly disallowed - AllowDIVExt = 2 // Allow hardware divide as optional architecture extension above + AllowDIVExt = 2, // Allow hardware divide as optional architecture extension above // the base arch specified by Tag_CPU_arch and Tag_CPU_arch_profile. + + // Tag_Virtualization_use, (=68), uleb128 + AllowTZ = 1, + AllowVirtualization = 2, + AllowTZVirtualization = 3 }; } // namespace ARMBuildAttrs diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp index db9792a8362..392b6f590eb 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.cpp +++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp @@ -108,6 +108,7 @@ void ARMSubtarget::initializeEnvironment() { AvoidMOVsShifterOperand = false; HasRAS = false; HasMPExtension = false; + HasVirtualization = false; FPOnlySP = false; HasPerfMon = false; HasTrustZone = false; diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index 41aa2adbbce..0eb0a4463e4 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -150,6 +150,10 @@ protected: /// extension (ARMv7 only). bool HasMPExtension; + /// HasVirtualization - True if the subtarget supports the Virtualization + /// extension. + bool HasVirtualization; + /// FPOnlySP - If true, the floating point unit only supports single /// precision. bool FPOnlySP; @@ -260,6 +264,7 @@ public: bool hasNEON() const { return HasNEON; } bool hasCrypto() const { return HasCrypto; } bool hasCRC() const { return HasCRC; } + bool hasVirtualization() const { return HasVirtualization; } bool useNEONForSinglePrecisionFP() const { return hasNEON() && UseNEONForSinglePrecisionFP; } |
