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-rw-r--r--llvm/lib/Target/ARM64/ARM64InstrInfo.cpp4
-rw-r--r--llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp4
-rw-r--r--llvm/lib/Target/ARM64/ARM64Subtarget.cpp4
-rw-r--r--llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp4
-rw-r--r--llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp4
5 files changed, 10 insertions, 10 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64InstrInfo.cpp b/llvm/lib/Target/ARM64/ARM64InstrInfo.cpp
index 55b8d5000e9..4a164b15e2e 100644
--- a/llvm/lib/Target/ARM64/ARM64InstrInfo.cpp
+++ b/llvm/lib/Target/ARM64/ARM64InstrInfo.cpp
@@ -23,11 +23,11 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_CTOR_DTOR
#include "ARM64GenInstrInfo.inc"
-using namespace llvm;
-
ARM64InstrInfo::ARM64InstrInfo(const ARM64Subtarget &STI)
: ARM64GenInstrInfo(ARM64::ADJCALLSTACKDOWN, ARM64::ADJCALLSTACKUP),
RI(this, &STI), Subtarget(STI) {}
diff --git a/llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp b/llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp
index 45ed25aab1d..21d3d955700 100644
--- a/llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp
+++ b/llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp
@@ -27,11 +27,11 @@
#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetOptions.h"
+using namespace llvm;
+
#define GET_REGINFO_TARGET_DESC
#include "ARM64GenRegisterInfo.inc"
-using namespace llvm;
-
ARM64RegisterInfo::ARM64RegisterInfo(const ARM64InstrInfo *tii,
const ARM64Subtarget *sti)
: ARM64GenRegisterInfo(ARM64::LR), TII(tii), STI(sti) {}
diff --git a/llvm/lib/Target/ARM64/ARM64Subtarget.cpp b/llvm/lib/Target/ARM64/ARM64Subtarget.cpp
index 2c18fd232ab..f30d69bbf34 100644
--- a/llvm/lib/Target/ARM64/ARM64Subtarget.cpp
+++ b/llvm/lib/Target/ARM64/ARM64Subtarget.cpp
@@ -18,14 +18,14 @@
#include "llvm/IR/GlobalValue.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define DEBUG_TYPE "arm64-subtarget"
#define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_TARGET_DESC
#include "ARM64GenSubtargetInfo.inc"
-using namespace llvm;
-
ARM64Subtarget::ARM64Subtarget(const std::string &TT, const std::string &CPU,
const std::string &FS)
: ARM64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
diff --git a/llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp b/llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
index 8a334e2f1b7..6979f00d474 100644
--- a/llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
+++ b/llvm/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
@@ -24,6 +24,8 @@
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/ErrorHandling.h"
+using namespace llvm;
+
// Pull DecodeStatus and its enum values into the global namespace.
typedef llvm::MCDisassembler::DecodeStatus DecodeStatus;
@@ -178,8 +180,6 @@ static DecodeStatus DecodeVecShiftL8Imm(llvm::MCInst &Inst, unsigned Imm,
#include "ARM64GenDisassemblerTables.inc"
#include "ARM64GenInstrInfo.inc"
-using namespace llvm;
-
#define Success llvm::MCDisassembler::Success
#define Fail llvm::MCDisassembler::Fail
diff --git a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp
index 412be50bbdd..a7ce09bdeaf 100644
--- a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp
+++ b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp
@@ -23,6 +23,8 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "ARM64GenInstrInfo.inc"
@@ -32,8 +34,6 @@
#define GET_REGINFO_MC_DESC
#include "ARM64GenRegisterInfo.inc"
-using namespace llvm;
-
static MCInstrInfo *createARM64MCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitARM64MCInstrInfo(X);
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