diff options
Diffstat (limited to 'llvm/lib/Target/ARM64/ARM64CallingConv.h')
| -rw-r--r-- | llvm/lib/Target/ARM64/ARM64CallingConv.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64CallingConv.h b/llvm/lib/Target/ARM64/ARM64CallingConv.h index 0128236be96..f24ba59dfb9 100644 --- a/llvm/lib/Target/ARM64/ARM64CallingConv.h +++ b/llvm/lib/Target/ARM64/ARM64CallingConv.h @@ -31,17 +31,17 @@ static bool CC_ARM64_Custom_i1i8i16_Reg(unsigned ValNo, MVT ValVT, MVT LocVT, ISD::ArgFlagsTy ArgFlags, CCState &State, bool IsWebKitJS = false) { - static const uint16_t RegList1[] = { ARM64::W0, ARM64::W1, ARM64::W2, - ARM64::W3, ARM64::W4, ARM64::W5, - ARM64::W6, ARM64::W7 }; - static const uint16_t RegList2[] = { ARM64::X0, ARM64::X1, ARM64::X2, - ARM64::X3, ARM64::X4, ARM64::X5, - ARM64::X6, ARM64::X7 }; - static const uint16_t WebKitRegList1[] = { ARM64::W0 }; - static const uint16_t WebKitRegList2[] = { ARM64::X0 }; + static const MCPhysReg RegList1[] = { ARM64::W0, ARM64::W1, ARM64::W2, + ARM64::W3, ARM64::W4, ARM64::W5, + ARM64::W6, ARM64::W7 }; + static const MCPhysReg RegList2[] = { ARM64::X0, ARM64::X1, ARM64::X2, + ARM64::X3, ARM64::X4, ARM64::X5, + ARM64::X6, ARM64::X7 }; + static const MCPhysReg WebKitRegList1[] = { ARM64::W0 }; + static const MCPhysReg WebKitRegList2[] = { ARM64::X0 }; - const uint16_t *List1 = IsWebKitJS ? WebKitRegList1 : RegList1; - const uint16_t *List2 = IsWebKitJS ? WebKitRegList2 : RegList2; + const MCPhysReg *List1 = IsWebKitJS ? WebKitRegList1 : RegList1; + const MCPhysReg *List2 = IsWebKitJS ? WebKitRegList2 : RegList2; if (unsigned Reg = State.AllocateReg(List1, List2, 8)) { // Customized extra section for handling i1/i8/i16: |
