diff options
Diffstat (limited to 'llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp index 7ff15cada49..a53bf4ebbbd 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -373,7 +373,7 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, isAdd = false; } if (Ctx && Value >= 4096) - Ctx->FatalError(Fixup.getLoc(), "out of range pc-relative fixup value"); + Ctx->reportFatalError(Fixup.getLoc(), "out of range pc-relative fixup value"); Value |= isAdd << 23; // Same addressing mode as fixup_arm_pcrel_10, @@ -394,7 +394,7 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, opc = 2; // 0b0010 } if (Ctx && ARM_AM::getSOImmVal(Value) == -1) - Ctx->FatalError(Fixup.getLoc(), "out of range pc-relative fixup value"); + Ctx->reportFatalError(Fixup.getLoc(), "out of range pc-relative fixup value"); // Encode the immediate and shift the opcode into place. return ARM_AM::getSOImmVal(Value) | (opc << 21); } @@ -543,7 +543,7 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, } // The value has the low 4 bits encoded in [3:0] and the high 4 in [11:8]. if (Ctx && Value >= 256) - Ctx->FatalError(Fixup.getLoc(), "out of range pc-relative fixup value"); + Ctx->reportFatalError(Fixup.getLoc(), "out of range pc-relative fixup value"); Value = (Value & 0xf) | ((Value & 0xf0) << 4); return Value | (isAdd << 23); } @@ -562,7 +562,7 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, // These values don't encode the low two bits since they're always zero. Value >>= 2; if (Ctx && Value >= 256) - Ctx->FatalError(Fixup.getLoc(), "out of range pc-relative fixup value"); + Ctx->reportFatalError(Fixup.getLoc(), "out of range pc-relative fixup value"); Value |= isAdd << 23; // Same addressing mode as fixup_arm_pcrel_10, but with 16-bit halfwords |
