1 files changed, 14 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
index 2d36c302001..b7642b1ba98 100644
--- a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -744,10 +744,21 @@ void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum,
                                        const MCSubtargetInfo &STI,
                                        raw_ostream &O) {
   O << "{";
-  for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {
-    if (i != OpNum)
+
+  // The backend may have given us a register list in non-ascending order. Sort
+  // it now.
+  std::vector<MCOperand> RegOps(MI->size() - OpNum);
+  std::copy(MI->begin() + OpNum, MI->end(), RegOps.begin());
+  std::sort(RegOps.begin(), RegOps.end(),
+            [this](const MCOperand &O1, const MCOperand &O2) -> bool {
+              return MRI.getEncodingValue(O1.getReg()) <
+                     MRI.getEncodingValue(O2.getReg());
+            });
+
+  for (unsigned i = 0, e = RegOps.size(); i != e; ++i) {
+    if (i != 0)
       O << ", ";
-    printRegName(O, MI->getOperand(i).getReg());
+    printRegName(O, RegOps[i].getReg());
   }
   O << "}";
 }