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-rw-r--r--llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 74d34e14430..f89968f670b 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3035,6 +3035,10 @@ processInstruction(MCInst &Inst,
if (Inst.getOperand(3).getImm() < 8)
Inst.setOpcode(ARM::tADDi3);
break;
+ case ARM::tBcc:
+ // If the conditional is AL, we really want tB.
+ if (Inst.getOperand(1).getImm() == ARMCC::AL)
+ Inst.setOpcode(ARM::tB);
}
}
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