diff options
Diffstat (limited to 'llvm/lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMTargetMachine.cpp | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index eaab7331e34..d68ffa2313c 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -333,12 +333,10 @@ public: void addIRPasses() override; bool addPreISel() override; bool addInstSelector() override; -#ifdef LLVM_BUILD_GLOBAL_ISEL bool addIRTranslator() override; bool addLegalizeMachineIR() override; bool addRegBankSelect() override; bool addGlobalInstructionSelect() override; -#endif void addPreRegAlloc() override; void addPreSched2() override; void addPreEmitPass() override; @@ -413,7 +411,6 @@ bool ARMPassConfig::addInstSelector() { return false; } -#ifdef LLVM_BUILD_GLOBAL_ISEL bool ARMPassConfig::addIRTranslator() { addPass(new IRTranslator()); return false; @@ -433,7 +430,6 @@ bool ARMPassConfig::addGlobalInstructionSelect() { addPass(new InstructionSelect()); return false; } -#endif void ARMPassConfig::addPreRegAlloc() { if (getOptLevel() != CodeGenOpt::None) { |