diff options
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstructionSelector.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp index 5d74d76b707..53298f6476d 100644 --- a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp +++ b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp @@ -39,13 +39,12 @@ static bool selectCopy(MachineInstr &I, const TargetInstrInfo &TII, return true; const RegisterBank *RegBank = RBI.getRegBank(DstReg, MRI, TRI); + (void)RegBank; assert(RegBank && "Can't get reg bank for virtual register"); - const unsigned DstSize = MRI.getType(DstReg).getSizeInBits(); - unsigned SrcReg = I.getOperand(1).getReg(); - const unsigned SrcSize = RBI.getSizeInBits(SrcReg, MRI, TRI); - (void)SrcSize; - assert(DstSize == SrcSize && "Copy with different width?!"); + assert(MRI.getType(DstReg).getSizeInBits() == + RBI.getSizeInBits(I.getOperand(1).getReg(), MRI, TRI) && + "Copy with different width?!"); assert(RegBank->getID() == ARM::GPRRegBankID && "Unsupported reg bank"); const TargetRegisterClass *RC = &ARM::GPRRegClass; |